target/arm: Implement AESD (indexed)
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20260826174213.614571-22-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson committed
Aug 26, 2026 at 10:42 UTC
7907ed492d88eeadfae7f3ef0c3bb9fbc6df13f7
4 files changed
+41
-12
target/arm/tcg/crypto_helper.c
+35
-12
@@ -99,6 +99,23 @@ void HELPER(crypto_aese_idx)(void *vd, void *vn, void *vm, uint32_t desc)
99
} while (s > 0);
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}
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+static void aesd_kernel(AESState *ad, const AESState *st, const AESState *rk)
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+{
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+ AESState t;
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+
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+ /* Our uint64_t are in the wrong order for big-endian. */
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+ if (HOST_BIG_ENDIAN) {
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+ t.d[0] = st->d[1] ^ rk->d[1];
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+ t.d[1] = st->d[0] ^ rk->d[0];
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+ aesdec_ISB_ISR_AK(&t, &t, &aes_zero, false);
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+ ad->d[0] = t.d[1];
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+ ad->d[1] = t.d[0];
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+ } else {
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+ t.v = st->v ^ rk->v;
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+ aesdec_ISB_ISR_AK(ad, &t, &aes_zero, false);
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+ }
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+}
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+
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void HELPER(crypto_aesd)(void *vd, void *vn, void *vm, uint32_t desc)
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{
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intptr_t i, opr_sz = simd_oprsz(desc);
@@ -107,23 +124,29 @@ void HELPER(crypto_aesd)(void *vd, void *vn, void *vm, uint32_t desc)
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AESState *ad = (AESState *)(vd + i);
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AESState *st = (AESState *)(vn + i);
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AESState *rk = (AESState *)(vm + i);
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- AESState t;
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- /* Our uint64_t are in the wrong order for big-endian. */
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- if (HOST_BIG_ENDIAN) {
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- t.d[0] = st->d[1] ^ rk->d[1];
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- t.d[1] = st->d[0] ^ rk->d[0];
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- aesdec_ISB_ISR_AK(&t, &t, &aes_zero, false);
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- ad->d[0] = t.d[1];
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- ad->d[1] = t.d[0];
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- } else {
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- t.v = st->v ^ rk->v;
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- aesdec_ISB_ISR_AK(ad, &t, &aes_zero, false);
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- }
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+ aesd_kernel(ad, st, rk);
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}
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clear_tail(vd, opr_sz, simd_maxsz(desc));
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}
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+void HELPER(crypto_aesd_idx)(void *vd, void *vn, void *vm, uint32_t desc)
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+{
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+ intptr_t opr_sz = simd_oprsz(desc);
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+ intptr_t idx = simd_data(desc);
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+ void *vm_idx = vm + idx * 16;
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+ intptr_t s = opr_sz - 16;
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+
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+ do {
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+ intptr_t base = ROUND_DOWN(s, 4 * 16);
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+ AESState rk = *(AESState *)(vm_idx + base);
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+ do {
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+ aesd_kernel(vd + s, vn + s, &rk);
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+ s -= 16;
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+ } while (s >= base);
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+ } while (s > 0);
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+}
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+
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void HELPER(crypto_aesmc)(void *vd, void *vm, uint32_t desc)
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{
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intptr_t i, opr_sz = simd_oprsz(desc);
target/arm/tcg/helper-defs.h
+1
@@ -462,6 +462,7 @@ DEF_HELPER_FLAGS_3(crypto_aesmc, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
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DEF_HELPER_FLAGS_3(crypto_aesimc, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(crypto_aese_idx, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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+DEF_HELPER_FLAGS_4(crypto_aesd_idx, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(crypto_sha1su0, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(crypto_sha1c, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
target/arm/tcg/sve.decode
+3
@@ -1985,6 +1985,9 @@ SM4E 01000101 00 10001 1 11100 0 ..... ..... @rdn_rm_e0
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AESE_idx 01000101 00 1 .. .10111010 ..... ....0 @aes2_2
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AESE_idx 01000101 00 1 .. .10111010 ..... ...00 @aes2_4
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+AESD_idx 01000101 00 1 .. .10111011 ..... ....0 @aes2_2
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+AESD_idx 01000101 00 1 .. .10111011 ..... ...00 @aes2_4
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+
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# SVE2 crypto constructive binary operations
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SM4EKEY 01000101 00 1 ..... 11110 0 ..... ..... @rd_rn_rm_e0
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RAX1 01000101 00 1 ..... 11110 1 ..... ..... @rd_rn_rm_e0
target/arm/tcg/translate-sve.c
+2
@@ -8344,6 +8344,8 @@ static bool do_aes2_idx(DisasContext *s, arg_rx_n *a, gen_helper_gvec_3 *fn)
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TRANS_FEAT_STREAMING_IF(AESE_idx, aa64_sve_aes2, aa64_ssve_aes,
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do_aes2_idx, a, gen_helper_crypto_aese_idx)
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+TRANS_FEAT_STREAMING_IF(AESD_idx, aa64_sve_aes2, aa64_ssve_aes,
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+ do_aes2_idx, a, gen_helper_crypto_aesd_idx)
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TRANS_FEAT(FCVTNT_sh_m, aa64_sme_or_sve2, gen_gvec_fpst_arg_zpz,
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gen_helper_sve2_fcvtnt_sh, a, 0, FPST_A64)