@samitouri / QOSamiQemu / commits / 7e55cb1581

target/riscv: Add standard B extension implied rule

Add the missing implied rule for standard B extension. Standard B extension implies Zba, Zbb, Zbs extensions. We can also remove the auto-enables in riscv_cpu_validate_b() as Zba, Zbb, Zbs extensions can be enabled by the implied rule. RISC-V B spec: https://github.com/riscv/riscv-b Reviewed-by: Jerry Zhang Jian <jerry.zhangjian@sifive.com> Reviewed-by: Jim Shu <jim.shu@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: Frank Chang <frank.chang@sifive.com> Signed-off-by: Frank Chang <frank.chang@sifive.com> Message-ID: <20260528054213.678458-3-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

Frank Chang committed May 28, 2026 at 13:42 UTC 7e55cb1581f69e3ac90632ff4e1e18f6c8d7ab52
2 files changed +16 -16
target/riscv/cpu.c
+13 -1
@@ -2107,6 +2107,17 @@ static RISCVCPUImpliedExtsRule RVG_IMPLIED = {
2107 },
2108 };
2109
2110 +static RISCVCPUImpliedExtsRule RVB_IMPLIED = {
2111 + .is_misa = true,
2112 + .ext = RVB,
2113 + .implied_multi_exts = {
2114 + CPU_CFG_OFFSET(ext_zba), CPU_CFG_OFFSET(ext_zbb),
2115 + CPU_CFG_OFFSET(ext_zbs),
2116 +
2117 + RISCV_IMPLIED_EXTS_RULE_END
2118 + },
2119 +};
2120 +
2121 static RISCVCPUImpliedExtsRule ZCB_IMPLIED = {
2122 .ext = CPU_CFG_OFFSET(ext_zcb),
2123 .implied_multi_exts = {
@@ -2514,7 +2525,8 @@ static RISCVCPUImpliedExtsRule ZVFBFA_IMPLIED = {
2525
2526 RISCVCPUImpliedExtsRule *riscv_misa_ext_implied_rules[] = {
2527 &RVA_IMPLIED, &RVD_IMPLIED, &RVF_IMPLIED,
2517 - &RVM_IMPLIED, &RVV_IMPLIED, &RVG_IMPLIED, NULL
2528 + &RVM_IMPLIED, &RVV_IMPLIED, &RVG_IMPLIED,
2529 + &RVB_IMPLIED, NULL
2530 };
2531
2532 RISCVCPUImpliedExtsRule *riscv_multi_ext_implied_rules[] = {
target/riscv/tcg/tcg-cpu.c
+3 -15
@@ -517,27 +517,15 @@ static void riscv_cpu_validate_b(RISCVCPU *cpu)
517 const char *warn_msg = "RVB mandates disabled extension %s";
518
519 if (!cpu->cfg.ext_zba) {
520 - if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zba))) {
521 - cpu->cfg.ext_zba = true;
522 - } else {
523 - warn_report(warn_msg, "zba");
524 - }
520 + warn_report(warn_msg, "zba");
521 }
522
523 if (!cpu->cfg.ext_zbb) {
528 - if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zbb))) {
529 - cpu->cfg.ext_zbb = true;
530 - } else {
531 - warn_report(warn_msg, "zbb");
532 - }
524 + warn_report(warn_msg, "zbb");
525 }
526
527 if (!cpu->cfg.ext_zbs) {
536 - if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zbs))) {
537 - cpu->cfg.ext_zbs = true;
538 - } else {
539 - warn_report(warn_msg, "zbs");
540 - }
528 + warn_report(warn_msg, "zbs");
529 }
530 }
531