hw/i2c/aspeed_i2c: Introduce AST1040 I2C model
Introduce the AST1040 I2C controller model. The AST1040 I2C controller is compatible with the AST2700 I2C controller, including DMA support and the 64-bit DMA address registers. Set has_dma64 so firmware can access the high address register and program it to zero, as the CM4 CPU only supports 32-bit addressing. AST1040 has 14 I2C buses and its HyperRAM is limited to 16 MiB, so restrict the DMA low address mask to 0x00ffffff. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20260603040027.938816-8-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
Jamin Lin committed
Jun 3, 2026 at 04:00 UTC
7e6329ca558029aeb48e280e88e5ac1ab16bfdf7
2 files changed
+34
hw/i2c/aspeed_i2c.c
+33
@@ -1654,6 +1654,34 @@ static void aspeed_1030_i2c_class_init(ObjectClass *klass, const void *data)
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aic->dma_addr_lo_mask = 0x7fffffff;
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}
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+static void aspeed_1040_i2c_class_init(ObjectClass *klass, const void *data)
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+{
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+ DeviceClass *dc = DEVICE_CLASS(klass);
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+ AspeedI2CClass *aic = ASPEED_I2C_CLASS(klass);
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+
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+ dc->desc = "ASPEED 1040 I2C Controller";
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+
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+ /*
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+ * AST1040 reuses the AST2700 I2C controller implementation since
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+ * the AST1040 is compatible with AST2700. AST1040 has 14 I2C buses,
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+ * and its HyperRAM is limited to 16 MiB, so the DMA low address
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+ * mask is restricted accordingly.
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+ */
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+ aic->num_busses = 14;
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+ aic->reg_size = 0xa0;
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+ aic->reg_gap_size = 0x60;
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+ aic->gap = -1; /* no gap */
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+ aic->bus_get_irq = aspeed_2600_i2c_bus_get_irq;
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+ aic->pool_size = 0x40;
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+ aic->pool_gap_size = 0xc0;
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+ aic->pool_base = 0x1c0;
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+ aic->bus_pool_base = aspeed_2500_i2c_bus_pool_base;
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+ aic->has_dma = true;
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+ aic->mem_size = 0x2000;
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+ aic->has_dma64 = true;
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+ aic->dma_addr_lo_mask = 0x00ffffff;
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+}
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+
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static void aspeed_2700_i2c_class_init(ObjectClass *klass, const void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
@@ -1703,6 +1731,11 @@ static const TypeInfo aspeed_i2c_types[] = {
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.parent = TYPE_ASPEED_I2C,
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.class_init = aspeed_1030_i2c_class_init,
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},
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+ {
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+ .name = TYPE_ASPEED_1040_I2C,
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+ .parent = TYPE_ASPEED_I2C,
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+ .class_init = aspeed_1040_i2c_class_init,
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+ },
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{
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.name = TYPE_ASPEED_2400_I2C,
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.parent = TYPE_ASPEED_I2C,
include/hw/i2c/aspeed_i2c.h
+1
@@ -30,6 +30,7 @@
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#define TYPE_ASPEED_2500_I2C TYPE_ASPEED_I2C "-ast2500"
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#define TYPE_ASPEED_2600_I2C TYPE_ASPEED_I2C "-ast2600"
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#define TYPE_ASPEED_1030_I2C TYPE_ASPEED_I2C "-ast1030"
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+#define TYPE_ASPEED_1040_I2C TYPE_ASPEED_I2C "-ast1040"
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#define TYPE_ASPEED_2700_I2C TYPE_ASPEED_I2C "-ast2700"
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OBJECT_DECLARE_TYPE(AspeedI2CState, AspeedI2CClass, ASPEED_I2C)
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