target/arm: advertise FEAT_RNG_TRAP on cortex-max
Set ID_AA64PFR1.RNDR_TRAP=1 on the max CPU model so guests and firmware detect FEAT_RNG_TRAP, per the Arm Architecture Reference Manual for A-profile architecture (DDI 0487), and document the feature as emulated in docs/system/arm/emulation.rst. Signed-off-by: Jason Wright <wrigjl@proton.me> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Jason Wright committed
May 28, 2026 at 18:19 UTC
7e637052fa2a4aa1032284284c9d6733d561d1be
2 files changed
+2
docs/system/arm/emulation.rst
+1
@@ -136,6 +136,7 @@ the following architecture extensions:
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- FEAT_RME (Realm Management Extension) (NB: support status in QEMU is experimental)
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- FEAT_RME_GPC2 (RME Granule Protection Check 2 Extension)
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- FEAT_RNG (Random number generator)
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+- FEAT_RNG_TRAP (Trapping support for RNDR/RNDRRS)
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- FEAT_RPRES (Increased precision of FRECPE and FRSQRTE)
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- FEAT_S1PIE (Stage 1 permission indirections)
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- FEAT_S2PIE (Stage 2 permission indirections)
target/arm/tcg/cpu64.c
+1
@@ -1292,6 +1292,7 @@ void aarch64_max_tcg_initfn(Object *obj)
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t = FIELD_DP64(t, ID_AA64PFR1, MTE, 3); /* FEAT_MTE3 */
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t = FIELD_DP64(t, ID_AA64PFR1, RAS_FRAC, 0); /* FEAT_RASv1p1 + FEAT_DoubleFault */
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t = FIELD_DP64(t, ID_AA64PFR1, SME, 2); /* FEAT_SME2 */
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+ t = FIELD_DP64(t, ID_AA64PFR1, RNDR_TRAP, 1); /* FEAT_RNG_TRAP */
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t = FIELD_DP64(t, ID_AA64PFR1, CSV2_FRAC, 0); /* FEAT_CSV2_3 */
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t = FIELD_DP64(t, ID_AA64PFR1, NMI, 1); /* FEAT_NMI */
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t = FIELD_DP64(t, ID_AA64PFR1, GCS, 1); /* FEAT_GCS */