target/hexagon: Add cpu modes, mmu indices, next_PC to state
Add cpu execution mode (user/supervisor/guest), MMU index, and next_PC to DisasContext and translation state. Declare the MMU_INDEX bit field in TB_FLAGS and use it to propagate the mmu index into translations. Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
Brian Cain committed
Jun 22, 2026 at 15:28 UTC
814fb7aac0ed3f3dd3b660187398f7751608107a
3 files changed
+23
-2
target/hexagon/cpu.c
+1
@@ -307,6 +307,7 @@ static void hexagon_cpu_reset_hold(Object *obj, ResetType type)
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memset(env->t_sreg, 0, sizeof(uint32_t) * NUM_SREGS);
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memset(env->greg, 0, sizeof(uint32_t) * NUM_GREGS);
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env->wait_next_pc = 0;
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+ env->next_PC = 0;
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#endif
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env->cause_code = HEX_EVENT_NONE;
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}
target/hexagon/cpu.h
+21
-1
@@ -49,8 +49,26 @@
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#define VSTORES_MAX 2
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#define CPU_RESOLVING_TYPE TYPE_HEXAGON_CPU
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+#ifndef CONFIG_USER_ONLY
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+#define CPU_INTERRUPT_SWI CPU_INTERRUPT_TGT_INT_0
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+
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+#define HEX_CPU_MODE_USER 1
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+#define HEX_CPU_MODE_GUEST 2
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+#define HEX_CPU_MODE_MONITOR 3
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+
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+#define HEX_EXE_MODE_OFF 1
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+#define HEX_EXE_MODE_RUN 2
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+#define HEX_EXE_MODE_WAIT 3
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+#define HEX_EXE_MODE_DEBUG 4
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+#endif
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+
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+#define MMU_USER_IDX 0
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+#ifndef CONFIG_USER_ONLY
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+#define MMU_GUEST_IDX 1
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+#define MMU_KERNEL_IDX 2
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+
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+#endif
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53
-#define MMU_USER_IDX 0
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#define HEXAGON_CPU_IRQ_0 0
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#define HEXAGON_CPU_IRQ_1 1
@@ -112,6 +130,7 @@ typedef struct CPUArchState {
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uint32_t threadId;
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uint64_t t_cycle_count;
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#endif
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+ uint32_t next_PC;
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target_ulong new_value_usr;
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MemLog mem_log_stores[STORES_MAX];
@@ -164,6 +183,7 @@ struct ArchCPU {
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#include "cpu_bits.h"
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FIELD(TB_FLAGS, IS_TIGHT_LOOP, 0, 1)
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+FIELD(TB_FLAGS, MMU_INDEX, 1, 3)
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FIELD(TB_FLAGS, PCYCLE_ENABLED, 4, 1)
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G_NORETURN void hexagon_raise_exception_err(CPUHexagonState *env,
target/hexagon/translate.c
+1
-1
@@ -988,7 +988,7 @@ static void hexagon_tr_init_disas_context(DisasContextBase *dcbase,
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HexagonCPU *hex_cpu = env_archcpu(cpu_env(cs));
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uint32_t hex_flags = dcbase->tb->flags;
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- ctx->mem_idx = MMU_USER_IDX;
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+ ctx->mem_idx = FIELD_EX32(hex_flags, TB_FLAGS, MMU_INDEX);
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ctx->num_packets = 0;
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ctx->num_insns = 0;
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ctx->num_hvx_insns = 0;