target/arm: Enable FEAT_SME_MOP4 for -cpu max
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20260702204314.79224-16-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson committed
Jul 2, 2026 at 13:43 UTC
82d7e57204219f2d870e7e9d02c7415c75dd532b
3 files changed
+3
docs/system/arm/emulation.rst
+1
@@ -175,6 +175,7 @@ the following architecture extensions:
175
- FEAT_SME_F8F32 (SME2 ZA-targeting FP8 multiply-accumulate, dot product, and outer product to single-precision instructions)
176
- FEAT_SME_I16I64 (16-bit to 64-bit integer widening outer product instructions)
177
- FEAT_SME_LUTv2 (Lookup table instructions with 4-bit indices and 8-bit elements)
178
+- FEAT_SME_MOP4 (Quarter-tile outer product instructions)
179
- FEAT_SSVE_AES (Streaming SVE Mode Advanced Encryption Standard and 128-bit polynomial multiply long instructions)
180
- FEAT_SSVE_FEXPA (Streaming FEXPA instruction)
181
- FEAT_SSVE_FP8DOT2 (SVE2 FP8 2-way dot product to half-precision instructions in Streaming SVE mode)
linux-user/aarch64/elfload.c
+1
@@ -176,6 +176,7 @@ abi_ulong get_elf_hwcap(CPUState *cs)
176
GET_FEATURE_ID(aa64_ssve_aes, ARM_HWCAP_A64_SME_AES);
177
GET_FEATURE_ID(aa64_ssve_fexpa, ARM_HWCAP_A64_SME_SFEXPA);
178
GET_FEATURE_ID(aa64_fprcvt, ARM_HWCAP_A64_FPRCVT);
179
+ GET_FEATURE_ID(aa64_sme_mop4, ARM_HWCAP_A64_SME_SMOP4);
180
181
return hwcaps;
182
}
target/arm/tcg/cpu64.c
+1
@@ -1385,6 +1385,7 @@ void aarch64_max_tcg_initfn(Object *obj)
1385
1386
t = GET_IDREG(isar, ID_AA64SMFR0);
1387
t = FIELD_DP64(t, ID_AA64SMFR0, SFEXPA, 1); /* FEAT_SSVE_FEXPA */
1388
+ t = FIELD_DP64(t, ID_AA64SMFR0, SMOP4, 1); /* FEAT_SME_MOP4 */
1389
t = FIELD_DP64(t, ID_AA64SMFR0, AES, 1); /* FEAT_SSVE_AES */
1390
t = FIELD_DP64(t, ID_AA64SMFR0, SF8DP2, 1); /* FEAT_SSVE_FP8DOT2 */
1391
t = FIELD_DP64(t, ID_AA64SMFR0, SF8DP4, 1); /* FEAT_SSVE_FP8DOT4 */