1312
dc->vmsd = &vmstate_aspeed_smc;
1313
}
1314
1315
-static const TypeInfo aspeed_smc_info = {
1316
- .name = TYPE_ASPEED_SMC,
1317
- .parent = TYPE_SYS_BUS_DEVICE,
1318
- .instance_init = aspeed_smc_instance_init,
1319
- .instance_size = sizeof(AspeedSMCState),
1320
- .class_size = sizeof(AspeedSMCClass),
1321
- .class_init = aspeed_smc_class_init,
1322
- .abstract = true,
1323
-};
1324
-
1315
static void aspeed_smc_flash_realize(DeviceState *dev, Error **errp)
1316
{
1317
AspeedSMCFlash *s = ASPEED_SMC_FLASH(dev);
1348
device_class_set_props(dc, aspeed_smc_flash_properties);
1349
}
1350
1361
-static const TypeInfo aspeed_smc_flash_info = {
1362
- .name = TYPE_ASPEED_SMC_FLASH,
1363
- .parent = TYPE_SYS_BUS_DEVICE,
1364
- .instance_size = sizeof(AspeedSMCFlash),
1365
- .class_init = aspeed_smc_flash_class_init,
1366
-};
1367
-
1351
/*
1352
* The Segment Registers of the AST2400 and AST2500 have a 8MB
1353
* unit. The address range of a flash SPI peripheral is encoded with
1398
asc->reg_ops = &aspeed_smc_flash_ops;
1399
}
1400
1418
-static const TypeInfo aspeed_2400_smc_info = {
1419
- .name = "aspeed.smc-ast2400",
1420
- .parent = TYPE_ASPEED_SMC,
1421
- .class_init = aspeed_2400_smc_class_init,
1422
-};
1423
-
1401
static const uint32_t aspeed_2400_fmc_resets[ASPEED_SMC_R_MAX] = {
1402
/*
1403
* CE0 and CE1 types are HW strapped in SCU70. Do it here to
1443
asc->reg_ops = &aspeed_smc_flash_ops;
1444
}
1445
1469
-static const TypeInfo aspeed_2400_fmc_info = {
1470
- .name = "aspeed.fmc-ast2400",
1471
- .parent = TYPE_ASPEED_SMC,
1472
- .class_init = aspeed_2400_fmc_class_init,
1473
-};
1474
-
1446
static const AspeedSegments aspeed_2400_spi1_segments[] = {
1447
{ 0x30000000, 64 * MiB },
1448
};
1477
asc->reg_ops = &aspeed_smc_flash_ops;
1478
}
1479
1509
-static const TypeInfo aspeed_2400_spi1_info = {
1510
- .name = "aspeed.spi1-ast2400",
1511
- .parent = TYPE_ASPEED_SMC,
1512
- .class_init = aspeed_2400_spi1_class_init,
1513
-};
1514
-
1480
static const uint32_t aspeed_2500_fmc_resets[ASPEED_SMC_R_MAX] = {
1481
[R_CONF] = (CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE0 |
1482
CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE1),
1517
asc->reg_ops = &aspeed_smc_flash_ops;
1518
}
1519
1555
-static const TypeInfo aspeed_2500_fmc_info = {
1556
- .name = "aspeed.fmc-ast2500",
1557
- .parent = TYPE_ASPEED_SMC,
1558
- .class_init = aspeed_2500_fmc_class_init,
1559
-};
1560
-
1520
static const AspeedSegments aspeed_2500_spi1_segments[] = {
1521
{ 0x30000000, 32 * MiB }, /* start address is readonly */
1522
{ 0x32000000, 96 * MiB }, /* end address is readonly */
1547
asc->reg_ops = &aspeed_smc_flash_ops;
1548
}
1549
1591
-static const TypeInfo aspeed_2500_spi1_info = {
1592
- .name = "aspeed.spi1-ast2500",
1593
- .parent = TYPE_ASPEED_SMC,
1594
- .class_init = aspeed_2500_spi1_class_init,
1595
-};
1596
-
1550
static const AspeedSegments aspeed_2500_spi2_segments[] = {
1551
{ 0x38000000, 32 * MiB }, /* start address is readonly */
1552
{ 0x3A000000, 96 * MiB }, /* end address is readonly */
1577
asc->reg_ops = &aspeed_smc_flash_ops;
1578
}
1579
1627
-static const TypeInfo aspeed_2500_spi2_info = {
1628
- .name = "aspeed.spi2-ast2500",
1629
- .parent = TYPE_ASPEED_SMC,
1630
- .class_init = aspeed_2500_spi2_class_init,
1631
-};
1632
-
1580
/*
1581
* The Segment Registers of the AST2600 have a 1MB unit. The address
1582
* range of a flash SPI peripheral is encoded with offsets in the overall
1659
asc->reg_ops = &aspeed_smc_flash_ops;
1660
}
1661
1715
-static const TypeInfo aspeed_2600_fmc_info = {
1716
- .name = "aspeed.fmc-ast2600",
1717
- .parent = TYPE_ASPEED_SMC,
1718
- .class_init = aspeed_2600_fmc_class_init,
1719
-};
1720
-
1662
static const AspeedSegments aspeed_2600_spi1_segments[] = {
1663
{ 0x0, 128 * MiB }, /* start address is readonly */
1664
{ 0x0, 0 }, /* disabled */
1693
asc->reg_ops = &aspeed_smc_flash_ops;
1694
}
1695
1755
-static const TypeInfo aspeed_2600_spi1_info = {
1756
- .name = "aspeed.spi1-ast2600",
1757
- .parent = TYPE_ASPEED_SMC,
1758
- .class_init = aspeed_2600_spi1_class_init,
1759
-};
1760
-
1696
static const AspeedSegments aspeed_2600_spi2_segments[] = {
1697
{ 0x0, 128 * MiB }, /* start address is readonly */
1698
{ 0x0, 0 }, /* disabled */
1728
asc->reg_ops = &aspeed_smc_flash_ops;
1729
}
1730
1796
-static const TypeInfo aspeed_2600_spi2_info = {
1797
- .name = "aspeed.spi2-ast2600",
1798
- .parent = TYPE_ASPEED_SMC,
1799
- .class_init = aspeed_2600_spi2_class_init,
1800
-};
1801
-
1731
/*
1732
* The FMC Segment Registers of the AST1030 have a 512KB unit.
1733
* Only bits [27:19] are used for decoding.
1806
asc->reg_ops = &aspeed_smc_flash_ops;
1807
}
1808
1880
-static const TypeInfo aspeed_1030_fmc_info = {
1881
- .name = "aspeed.fmc-ast1030",
1882
- .parent = TYPE_ASPEED_SMC,
1883
- .class_init = aspeed_1030_fmc_class_init,
1884
-};
1885
-
1809
static const AspeedSegments aspeed_1030_spi1_segments[] = {
1810
{ 0x0, 128 * MiB }, /* start address is readonly */
1811
{ 0x0, 0 }, /* disabled */
1839
asc->reg_ops = &aspeed_smc_flash_ops;
1840
}
1841
1919
-static const TypeInfo aspeed_1030_spi1_info = {
1920
- .name = "aspeed.spi1-ast1030",
1921
- .parent = TYPE_ASPEED_SMC,
1922
- .class_init = aspeed_1030_spi1_class_init,
1923
-};
1842
static const AspeedSegments aspeed_1030_spi2_segments[] = {
1843
{ 0x0, 128 * MiB }, /* start address is readonly */
1844
{ 0x0, 0 }, /* disabled */
1872
asc->reg_ops = &aspeed_smc_flash_ops;
1873
}
1874
1957
-static const TypeInfo aspeed_1030_spi2_info = {
1958
- .name = "aspeed.spi2-ast1030",
1959
- .parent = TYPE_ASPEED_SMC,
1960
- .class_init = aspeed_1030_spi2_class_init,
1961
-};
1962
-
1875
/*
1876
* The FMC Segment Registers of the AST2700 have a 64KB unit.
1877
* Only bits [31:16] are used for decoding.
1973
asc->reg_ops = &aspeed_2700_smc_flash_ops;
1974
}
1975
2064
-static const TypeInfo aspeed_2700_fmc_info = {
2065
- .name = "aspeed.fmc-ast2700",
2066
- .parent = TYPE_ASPEED_SMC,
2067
- .class_init = aspeed_2700_fmc_class_init,
2068
-};
2069
-
1976
static const AspeedSegments aspeed_2700_spi0_segments[] = {
1977
{ 0x0, 128 * MiB }, /* start address is readonly */
1978
{ 128 * MiB, 128 * MiB }, /* start address is readonly */
2008
asc->reg_ops = &aspeed_2700_smc_flash_ops;
2009
}
2010
2105
-static const TypeInfo aspeed_2700_spi0_info = {
2106
- .name = "aspeed.spi0-ast2700",
2107
- .parent = TYPE_ASPEED_SMC,
2108
- .class_init = aspeed_2700_spi0_class_init,
2109
-};
2110
-
2011
static const AspeedSegments aspeed_2700_spi1_segments[] = {
2012
{ 0x0, 128 * MiB }, /* start address is readonly */
2013
{ 0x0, 0 }, /* disabled */
2042
asc->reg_ops = &aspeed_2700_smc_flash_ops;
2043
}
2044
2145
-static const TypeInfo aspeed_2700_spi1_info = {
2146
- .name = "aspeed.spi1-ast2700",
2147
- .parent = TYPE_ASPEED_SMC,
2148
- .class_init = aspeed_2700_spi1_class_init,
2149
-};
2150
-
2045
static const AspeedSegments aspeed_2700_spi2_segments[] = {
2046
{ 0x0, 128 * MiB }, /* start address is readonly */
2047
{ 0x0, 0 }, /* disabled */
2076
asc->reg_ops = &aspeed_2700_smc_flash_ops;
2077
}
2078
2185
-static const TypeInfo aspeed_2700_spi2_info = {
2186
- .name = "aspeed.spi2-ast2700",
2187
- .parent = TYPE_ASPEED_SMC,
2079
+static const TypeInfo aspeed_smc_types[] = {
2080
+ {
2081
+ .name = TYPE_ASPEED_SMC_FLASH,
2082
+ .parent = TYPE_SYS_BUS_DEVICE,
2083
+ .instance_size = sizeof(AspeedSMCFlash),
2084
+ .class_init = aspeed_smc_flash_class_init,
2085
+ },
2086
+ {
2087
+ .name = TYPE_ASPEED_SMC,
2088
+ .parent = TYPE_SYS_BUS_DEVICE,
2089
+ .instance_init = aspeed_smc_instance_init,
2090
+ .instance_size = sizeof(AspeedSMCState),
2091
+ .class_size = sizeof(AspeedSMCClass),
2092
+ .class_init = aspeed_smc_class_init,
2093
+ .abstract = true,
2094
+ },
2095
+ {
2096
+ .name = "aspeed.fmc-ast1030",
2097
+ .parent = TYPE_ASPEED_SMC,
2098
+ .class_init = aspeed_1030_fmc_class_init,
2099
+ },
2100
+ {
2101
+ .name = "aspeed.spi1-ast1030",
2102
+ .parent = TYPE_ASPEED_SMC,
2103
+ .class_init = aspeed_1030_spi1_class_init,
2104
+ },
2105
+ {
2106
+ .name = "aspeed.spi2-ast1030",
2107
+ .parent = TYPE_ASPEED_SMC,
2108
+ .class_init = aspeed_1030_spi2_class_init,
2109
+ },
2110
+ {
2111
+ .name = "aspeed.smc-ast2400",
2112
+ .parent = TYPE_ASPEED_SMC,
2113
+ .class_init = aspeed_2400_smc_class_init,
2114
+ },
2115
+ {
2116
+ .name = "aspeed.fmc-ast2400",
2117
+ .parent = TYPE_ASPEED_SMC,
2118
+ .class_init = aspeed_2400_fmc_class_init,
2119
+ },
2120
+ {
2121
+ .name = "aspeed.spi1-ast2400",
2122
+ .parent = TYPE_ASPEED_SMC,
2123
+ .class_init = aspeed_2400_spi1_class_init,
2124
+ },
2125
+ {
2126
+ .name = "aspeed.fmc-ast2500",
2127
+ .parent = TYPE_ASPEED_SMC,
2128
+ .class_init = aspeed_2500_fmc_class_init,
2129
+ },
2130
+ {
2131
+ .name = "aspeed.spi1-ast2500",
2132
+ .parent = TYPE_ASPEED_SMC,
2133
+ .class_init = aspeed_2500_spi1_class_init,
2134
+ },
2135
+ {
2136
+ .name = "aspeed.spi2-ast2500",
2137
+ .parent = TYPE_ASPEED_SMC,
2138
+ .class_init = aspeed_2500_spi2_class_init,
2139
+ },
2140
+ {
2141
+ .name = "aspeed.fmc-ast2600",
2142
+ .parent = TYPE_ASPEED_SMC,
2143
+ .class_init = aspeed_2600_fmc_class_init,
2144
+ },
2145
+ {
2146
+ .name = "aspeed.spi1-ast2600",
2147
+ .parent = TYPE_ASPEED_SMC,
2148
+ .class_init = aspeed_2600_spi1_class_init,
2149
+ },
2150
+ {
2151
+ .name = "aspeed.spi2-ast2600",
2152
+ .parent = TYPE_ASPEED_SMC,
2153
+ .class_init = aspeed_2600_spi2_class_init,
2154
+ },
2155
+ {
2156
+ .name = "aspeed.fmc-ast2700",
2157
+ .parent = TYPE_ASPEED_SMC,
2158
+ .class_init = aspeed_2700_fmc_class_init,
2159
+ },
2160
+ {
2161
+ .name = "aspeed.spi0-ast2700",
2162
+ .parent = TYPE_ASPEED_SMC,
2163
+ .class_init = aspeed_2700_spi0_class_init,
2164
+ },
2165
+ {
2166
+ .name = "aspeed.spi1-ast2700",
2167
+ .parent = TYPE_ASPEED_SMC,
2168
+ .class_init = aspeed_2700_spi1_class_init,
2169
+ },
2170
+ {
2171
+ .name = "aspeed.spi2-ast2700",
2172
+ .parent = TYPE_ASPEED_SMC,
2173
.class_init = aspeed_2700_spi2_class_init,
2174
+ }
2175
};
2176
2191
-static void aspeed_smc_register_types(void)
2192
-{
2193
- type_register_static(&aspeed_smc_flash_info);
2194
- type_register_static(&aspeed_smc_info);
2195
- type_register_static(&aspeed_2400_smc_info);
2196
- type_register_static(&aspeed_2400_fmc_info);
2197
- type_register_static(&aspeed_2400_spi1_info);
2198
- type_register_static(&aspeed_2500_fmc_info);
2199
- type_register_static(&aspeed_2500_spi1_info);
2200
- type_register_static(&aspeed_2500_spi2_info);
2201
- type_register_static(&aspeed_2600_fmc_info);
2202
- type_register_static(&aspeed_2600_spi1_info);
2203
- type_register_static(&aspeed_2600_spi2_info);
2204
- type_register_static(&aspeed_1030_fmc_info);
2205
- type_register_static(&aspeed_1030_spi1_info);
2206
- type_register_static(&aspeed_1030_spi2_info);
2207
- type_register_static(&aspeed_2700_fmc_info);
2208
- type_register_static(&aspeed_2700_spi0_info);
2209
- type_register_static(&aspeed_2700_spi1_info);
2210
- type_register_static(&aspeed_2700_spi2_info);
2211
-}
2212
-
2213
-type_init(aspeed_smc_register_types)
2177
+DEFINE_TYPES(aspeed_smc_types)