target/riscv/tcg: sret in virtual user mode raises virtual instruction exception
Currently, when a `sret` is executed in virtual user mode, qemu raise an `illegal instruction exception`, but in this case the correct behavior is to raise a `virtual instruction exception` and the code already contains a check to it, but it's not enough to catch. This patch is useful to improve the correctness of the virtualization of the risc v architecture. Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3622 Signed-off-by: Christian S. Lima <christianslima@proton.me> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20260808031849.59726-1-christianslima@proton.me> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Christian S. Lima committed
Aug 8, 2026 at 03:18 UTC
85d38315fd19cda7fcfec5350f27cdfa15742600
1 file changed
+5
-4
target/riscv/tcg/op_helper.c
+5
-4
@@ -308,6 +308,11 @@ target_ulong helper_sret(CPURISCVState *env)
308
const privilege_mode_t src_priv = env->priv;
309
const bool src_virt = env->virt_enabled;
310
311
+ if ((env->virt_enabled && env->priv < PRV_S) ||
312
+ (env->virt_enabled && get_field(env->hstatus, HSTATUS_VTSR))) {
313
+ riscv_raise_exception(env, RISCV_EXCP_VIRT_INSTRUCTION_FAULT, GETPC());
314
+ }
315
+
316
if (!(env->priv >= PRV_S)) {
317
riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
318
}
@@ -323,10 +328,6 @@ target_ulong helper_sret(CPURISCVState *env)
328
riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
329
}
330
326
- if (env->virt_enabled && get_field(env->hstatus, HSTATUS_VTSR)) {
327
- riscv_raise_exception(env, RISCV_EXCP_VIRT_INSTRUCTION_FAULT, GETPC());
328
- }
329
-
331
mstatus = env->mstatus;
332
prev_priv = get_field(mstatus, MSTATUS_SPP);
333
mstatus = set_field(mstatus, MSTATUS_SIE,