include/hw/hyperv: add hv_vp_register_page struct definition
Define the `hv_vp_register_page` structure that the linux kernel uses to allow access to vcpu registers. This structure is going to be used in later patches to access vcpu registers. Signed-off-by: Doru Blânzeanu <dblanzeanu@linux.microsoft.com> Reviewed-by: Mohamed Mediouni <mohamed@unpredictable.fr> Link: https://lore.kernel.org/r/20260428135053.251200-4-dblanzeanu@linux.microsoft.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Doru Blânzeanu committed
Apr 28, 2026 at 16:50 UTC
8afb40b7fe22f94ed9eb03982146ba1dd027dd19
1 file changed
+103
include/hw/hyperv/hvgdk_mini.h
+103
@@ -504,6 +504,109 @@ struct hv_input_assert_virtual_interrupt {
504
uint16_t rsvd_z1;
505
} QEMU_PACKED;
506
507
+/* Flags for dirty mask of hv_vp_register_page */
508
+enum hv_x64_register_class_type {
509
+ HV_X64_REGISTER_CLASS_GENERAL = 0,
510
+ HV_X64_REGISTER_CLASS_IP = 1,
511
+ HV_X64_REGISTER_CLASS_XMM = 2,
512
+ HV_X64_REGISTER_CLASS_SEGMENT = 3,
513
+ HV_X64_REGISTER_CLASS_FLAGS = 4,
514
+};
515
+
516
+#define HV_VP_REGISTER_PAGE_MAX_VECTOR_COUNT 7
517
+
518
+union hv_vp_register_page_interrupt_vectors {
519
+ uint64_t as_uint64;
520
+ struct {
521
+ uint8_t vector_count;
522
+ uint8_t vector[HV_VP_REGISTER_PAGE_MAX_VECTOR_COUNT];
523
+ };
524
+};
525
+
526
+struct hv_vp_register_page {
527
+ uint16_t version;
528
+ uint8_t isvalid;
529
+ uint8_t rsvdz;
530
+ uint32_t dirty;
531
+
532
+ union {
533
+ struct {
534
+ /* General purpose registers (HV_X64_REGISTER_CLASS_GENERAL) */
535
+ union {
536
+ struct {
537
+ uint64_t rax;
538
+ uint64_t rcx;
539
+ uint64_t rdx;
540
+ uint64_t rbx;
541
+ uint64_t rsp;
542
+ uint64_t rbp;
543
+ uint64_t rsi;
544
+ uint64_t rdi;
545
+ uint64_t r8;
546
+ uint64_t r9;
547
+ uint64_t r10;
548
+ uint64_t r11;
549
+ uint64_t r12;
550
+ uint64_t r13;
551
+ uint64_t r14;
552
+ uint64_t r15;
553
+ } QEMU_PACKED;
554
+
555
+ uint64_t gp_registers[16];
556
+ };
557
+ /* Instruction pointer (HV_X64_REGISTER_CLASS_IP) */
558
+ uint64_t rip;
559
+ /* Flags (HV_X64_REGISTER_CLASS_FLAGS) */
560
+ uint64_t rflags;
561
+ } QEMU_PACKED;
562
+
563
+ uint64_t registers[18];
564
+ };
565
+ uint8_t reserved[8];
566
+ /* Volatile XMM registers (HV_X64_REGISTER_CLASS_XMM) */
567
+ union {
568
+ struct {
569
+ struct hv_u128 xmm0;
570
+ struct hv_u128 xmm1;
571
+ struct hv_u128 xmm2;
572
+ struct hv_u128 xmm3;
573
+ struct hv_u128 xmm4;
574
+ struct hv_u128 xmm5;
575
+ } QEMU_PACKED;
576
+
577
+ struct hv_u128 xmm_registers[6];
578
+ };
579
+ /* Segment registers (HV_X64_REGISTER_CLASS_SEGMENT) */
580
+ union {
581
+ struct {
582
+ struct hv_x64_segment_register es;
583
+ struct hv_x64_segment_register cs;
584
+ struct hv_x64_segment_register ss;
585
+ struct hv_x64_segment_register ds;
586
+ struct hv_x64_segment_register fs;
587
+ struct hv_x64_segment_register gs;
588
+ } QEMU_PACKED;
589
+
590
+ struct hv_x64_segment_register segment_registers[6];
591
+ };
592
+ /* Misc. control registers (cannot be set via this interface) */
593
+ uint64_t cr0;
594
+ uint64_t cr3;
595
+ uint64_t cr4;
596
+ uint64_t cr8;
597
+ uint64_t efer;
598
+ uint64_t dr7;
599
+ union hv_x64_pending_interruption_register pending_interruption;
600
+ union hv_x64_interrupt_state_register interrupt_state;
601
+ uint64_t instruction_emulation_hints;
602
+ uint64_t xfem;
603
+
604
+ uint8_t reserved1[0x100];
605
+
606
+ /* Interrupts injected as part of HvCallDispatchVp. */
607
+ union hv_vp_register_page_interrupt_vectors interrupt_vectors;
608
+} QEMU_PACKED;
609
+
610
/* /dev/mshv */
611
#define MSHV_CREATE_PARTITION _IOW(MSHV_IOCTL, 0x00, struct mshv_create_partition)
612
#define MSHV_CREATE_VP _IOW(MSHV_IOCTL, 0x01, struct mshv_create_vp)