hw/riscv/spike.c: use create_fdt_socket_cpus()
Use the new FDT helper to create FDTs for the CPU sockets. Signed-off-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20260615203734.954428-12-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Daniel Henrique Barboza committed
Jun 15, 2026 at 17:37 UTC
8ddb7eb5af64b002054c41b037bf3d39d4d9aff9
1 file changed
+7
-47
hw/riscv/spike.c
+7
-47
@@ -56,11 +56,9 @@ static void create_fdt(SpikeState *s, const MemMapEntry *memmap,
56
void *fdt;
57
int fdt_size;
58
unsigned long clint_addr;
59
- int cpu, socket;
59
+ int socket;
60
MachineState *ms = MACHINE(s);
61
- uint32_t cpu_phandle, phandle = 1;
62
- char *clust_name;
63
- char *core_name, *cpu_name, *intc_name;
61
+ uint32_t phandle = 1;
62
bool numa_enabled = riscv_numa_enabled(ms);
63
64
fdt = ms->fdt = create_board_device_tree("ucbbar,spike-bare,qemu",
@@ -82,48 +80,11 @@ static void create_fdt(SpikeState *s, const MemMapEntry *memmap,
80
riscv_socket_mem_offset(ms, socket);
81
uint64_t memsize = riscv_socket_mem_size(ms, socket);
82
85
- clust_name = g_strdup_printf("/cpus/cpu-map/cluster%d", socket);
86
- qemu_fdt_add_subnode(fdt, clust_name);
87
-
88
- for (cpu = s->soc[socket].num_harts - 1; cpu >= 0; cpu--) {
89
- cpu_phandle = phandle++;
90
-
91
- cpu_name = g_strdup_printf("/cpus/cpu@%d",
92
- s->soc[socket].hartid_base + cpu);
93
- qemu_fdt_add_subnode(fdt, cpu_name);
94
- if (is_32_bit) {
95
- qemu_fdt_setprop_string(fdt, cpu_name, "mmu-type", "riscv,sv32");
96
- } else {
97
- qemu_fdt_setprop_string(fdt, cpu_name, "mmu-type", "riscv,sv48");
98
- }
99
- riscv_isa_write_fdt(&s->soc[socket].harts[cpu], fdt, cpu_name);
100
- qemu_fdt_setprop_string(fdt, cpu_name, "compatible", "riscv");
101
- qemu_fdt_setprop_string(fdt, cpu_name, "status", "okay");
102
- qemu_fdt_setprop_cell(fdt, cpu_name, "reg",
103
- s->soc[socket].hartid_base + cpu);
104
- qemu_fdt_setprop_string(fdt, cpu_name, "device_type", "cpu");
105
- riscv_socket_fdt_write_id(ms, cpu_name, socket);
106
- qemu_fdt_setprop_cell(fdt, cpu_name, "phandle", cpu_phandle);
107
-
108
- intc_phandles[cpu] = phandle++;
109
-
110
- intc_name = g_strdup_printf("%s/interrupt-controller", cpu_name);
111
- qemu_fdt_add_subnode(fdt, intc_name);
112
- qemu_fdt_setprop_cell(fdt, intc_name, "phandle",
113
- intc_phandles[cpu]);
114
- qemu_fdt_setprop_string(fdt, intc_name, "compatible",
115
- "riscv,cpu-intc");
116
- qemu_fdt_setprop(fdt, intc_name, "interrupt-controller", NULL, 0);
117
- qemu_fdt_setprop_cell(fdt, intc_name, "#interrupt-cells", 1);
118
-
119
- core_name = g_strdup_printf("%s/core%d", clust_name, cpu);
120
- qemu_fdt_add_subnode(fdt, core_name);
121
- qemu_fdt_setprop_cell(fdt, core_name, "cpu", cpu_phandle);
122
-
123
- g_free(core_name);
124
- g_free(intc_name);
125
- g_free(cpu_name);
126
- }
83
+ create_fdt_socket_cpus(fdt, (&s->soc[socket])->harts, socket,
84
+ s->soc[socket].num_harts,
85
+ s->soc[socket].hartid_base,
86
+ &phandle, intc_phandles, numa_enabled,
87
+ is_32_bit);
88
89
create_fdt_socket_memory(fdt, memaddr, memsize, socket,
90
riscv_numa_enabled(ms));
@@ -133,7 +94,6 @@ static void create_fdt(SpikeState *s, const MemMapEntry *memmap,
94
create_fdt_socket_clint(fdt, clint_addr, memmap[SPIKE_CLINT].size,
95
socket, intc_phandles,
96
s->soc[socket].num_harts, numa_enabled);
136
- g_free(clust_name);
97
}
98
99
riscv_socket_fdt_write_distance_matrix(ms);