target/riscv: move debug.h to tcg subdir
riscv_trigger_* APIs are TCG only. Wrap the usages we have of them in cpu.c with CONFIG_TCG. After that we can move the header to the tcg subdir. This will be enough to get this out of the way for the --disable-tcg build. Signed-off-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20260703180538.3346781-9-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Daniel Henrique Barboza committed
Jul 3, 2026 at 15:05 UTC
8eaa5b73ab310610ac33f9d78e801371ea6bafc6
7 files changed
+10
-8
target/riscv/cpu.c
+5
-3
@@ -39,7 +39,7 @@
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#include "kvm/kvm_riscv.h"
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#include "tcg/tcg-cpu.h"
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#if !defined(CONFIG_USER_ONLY)
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-#include "target/riscv/debug.h"
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+#include "target/riscv/tcg/debug.h"
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#endif
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/* RISC-V CPU definitions */
@@ -856,9 +856,11 @@ static void riscv_cpu_reset_hold(Object *obj, ResetType type)
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env->vill = true;
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#ifndef CONFIG_USER_ONLY
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+#ifdef CONFIG_TCG
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if (cpu->cfg.debug) {
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riscv_trigger_reset_hold(env);
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}
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+#endif
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if (cpu->cfg.ext_smrnmi) {
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env->rnmip = 0;
@@ -1016,7 +1018,7 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp)
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riscv_cpu_register_gdb_regs_for_features(cs);
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-#ifndef CONFIG_USER_ONLY
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+#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
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if (cpu->cfg.debug) {
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riscv_trigger_realize(&cpu->env);
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}
@@ -1031,7 +1033,7 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp)
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static void riscv_cpu_unrealize(DeviceState *dev)
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{
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RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(dev);
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-#ifndef CONFIG_USER_ONLY
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+#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
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RISCVCPU *cpu = RISCV_CPU(dev);
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if (cpu->cfg.debug) {
target/riscv/machine.c
+1
-1
@@ -23,7 +23,7 @@
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#include "system/tcg.h"
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#include "migration/cpu.h"
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#include "exec/icount.h"
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-#include "target/riscv/debug.h"
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+#include "target/riscv/tcg/debug.h"
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#include "hw/riscv/machines-qom.h"
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static bool pmp_needed(void *opaque)
target/riscv/tcg/cpu_helper.c
+1
-1
@@ -35,7 +35,7 @@
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#include "semihosting/common-semi.h"
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#include "exec/icount.h"
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#include "cpu_bits.h"
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-#include "target/riscv/debug.h"
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+#include "target/riscv/tcg/debug.h"
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#include "pmp.h"
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#include "qemu/plugin.h"
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target/riscv/tcg/csr.c
+1
-1
@@ -34,7 +34,7 @@
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#include "tcg/insn-start-words.h"
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#include "internals.h"
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#if !defined(CONFIG_USER_ONLY)
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-#include "target/riscv/debug.h"
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+#include "target/riscv/tcg/debug.h"
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#endif
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/* CSR function table public API */
target/riscv/tcg/debug.c
+1
-1
@@ -28,7 +28,7 @@
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#include "qapi/error.h"
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#include "qemu/error-report.h"
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#include "cpu.h"
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-#include "target/riscv/debug.h"
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+#include "target/riscv/tcg/debug.h"
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#include "trace.h"
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#include "exec/helper-proto.h"
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#include "exec/watchpoint.h"
target/riscv/tcg/debug.h
renamed
target/riscv/tcg/tcg-cpu.c
+1
-1
@@ -37,7 +37,7 @@
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#include "hw/core/boards.h"
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#include "system/tcg.h"
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#include "exec/icount.h"
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-#include "target/riscv/debug.h"
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+#include "target/riscv/tcg/debug.h"
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#endif
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/* Hash that stores user set extensions */