hw/core: Add riscv[32|64] to "none" machine
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20260520-hw-riscv-cpu-int-v3-5-d1123ea63d9c@rev.ng> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Anton Johansson committed
Dec 15, 2025 at 12:39 UTC
90c356624ae5699f1e74fbb5ae6c44171cf7187a
1 file changed
+3
hw/core/null-machine.c
+3
@@ -17,6 +17,7 @@
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#include "system/address-spaces.h"
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#include "hw/core/cpu.h"
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#include "hw/arm/machines-qom.h"
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+#include "hw/riscv/machines-qom.h"
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static void machine_none_init(MachineState *mch)
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{
@@ -59,4 +60,6 @@ static void machine_none_machine_init(MachineClass *mc)
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DEFINE_MACHINE_WITH_INTERFACES("none", machine_none_machine_init,
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{ TYPE_TARGET_AARCH64_MACHINE },
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{ TYPE_TARGET_ARM_MACHINE },
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+ { TYPE_TARGET_RISCV32_MACHINE },
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+ { TYPE_TARGET_RISCV64_MACHINE },
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{ })