@samitouri / QOSamiQemu / commits / 9289440015

hw/block/m25p80: Add HAS_SR_TB flag for is25lp016d

The is25lp016d has 4 Block Write Protect Bits. BP3 specifies whether the upper or lower range should be protected. Therefore, we add the HAS_SR_TB flag to the is25lp016d flags. Signed-off-by: YannickV <Y.Vossen@beckhoff.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20260518073401.11279-10-corvin.koehne@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

YannickV committed May 18, 2026 at 09:33 UTC 9289440015c32b48138b16eff4f00f8c08d5d16e
1 file changed +2 -1
hw/block/m25p80.c
+2 -1
@@ -217,7 +217,8 @@ static const FlashPartInfo known_devices[] = {
217 /* ISSI */
218 { INFO("is25lq040b", 0x9d4013, 0, 64 << 10, 8, ER_4K) },
219 { INFO("is25lp080d", 0x9d6014, 0, 64 << 10, 16, ER_4K) },
220 - { INFO("is25lp016d", 0x9d6015, 0, 64 << 10, 32, ER_4K) },
220 + { INFO("is25lp016d", 0x9d6015, 0, 64 << 10, 32,
221 + ER_4K | HAS_SR_TB) },
222 { INFO("is25lp032", 0x9d6016, 0, 64 << 10, 64, ER_4K) },
223 { INFO("is25lp064", 0x9d6017, 0, 64 << 10, 128, ER_4K) },
224 { INFO("is25lp128", 0x9d6018, 0, 64 << 10, 256, ER_4K) },