hw/net/cadence: Return current Cadence GEM queue pointers

Cadence GEM queue pointer registers are programmed with the descriptor ring base, but reads return the descriptor currently being accessed. The model tracked the current positions separately while continuing to return the configured base. The Linux macb driver uses the transmit queue pointer when recovering from a used-buffer interrupt. A stale priority-queue pointer can make the driver restart DMA before that queue handles its completion interrupt, causing queue 0 to repeatedly raise TX_USED. The primary queue has had this mismatch since the initial model. Priority queue support later copied the same register-read behavior. A single-queue machine usually handles TX_COMPLETE before TX_USED and empties the software queue before the restart check, which kept the issue hidden there. Return the current RX and TX descriptor positions on queue-pointer reads and clear those positions on reset. Fixes: e9f186e514a7 ("cadence_gem: initial version of device model") Fixes: 6710172501be ("cadence_gem: Add queue support") Cc: qemu-stable@nongnu.org Signed-off-by: Bin Meng <bin.meng@processmission.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Message-ID: <20260720120731.2022475-1-bin.meng@processmission.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>