@samitouri / QOSamiQemu / commits / 9d2e171fd6

tcg/riscv64: Implement revbit8

Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Richard Henderson committed Aug 10, 2026 at 11:55 UTC 9d2e171fd606dc7c7b93bd8648a40e3cf745b22a
1 file changed +16 -1
tcg/riscv64/tcg-target.c.inc
+16 -1
@@ -246,6 +246,9 @@ typedef enum {
246 OPC_XNOR = 0x40004033,
247 OPC_ZEXT_H = 0x0800403b,
248
249 + /* Zbkb: Bit Manipulation for Cryptography */
250 + OPC_BREV8 = 0x68705013,
251 +
252 /* Zicond: integer conditional operations */
253 OPC_CZERO_EQZ = 0x0e005033,
254 OPC_CZERO_NEZ = 0x0e007033,
@@ -2469,8 +2472,20 @@ static const TCGOutOpUnary outop_bswap64 = {
2472 .out_rr = tgen_bswap64,
2473 };
2474
2475 +static TCGConstraintSetIndex cset_revbit8(TCGType type, unsigned flags)
2476 +{
2477 + return cpuinfo & CPUINFO_ZBKB ? C_O1_I1(r, r) : C_NotImplemented;
2478 +}
2479 +
2480 +static void tgen_revbit8(TCGContext *s, TCGType type, TCGReg a0, TCGReg a1)
2481 +{
2482 + tcg_out_opc_imm(s, OPC_BREV8, a0, a1, 0);
2483 +}
2484 +
2485 static const TCGOutOpUnary outop_revbit8 = {
2473 - .base.static_constraint = C_NotImplemented,
2486 + .base.static_constraint = C_Dynamic,
2487 + .base.dynamic_constraint = cset_revbit8,
2488 + .out_rr = tgen_revbit8,
2489 };
2490
2491 static const TCGOutOpBswap outop_revbit32 = {