@samitouri / QOSamiQemu / commits / 9dad341a52

hw/nmi: Remove @cpu_index argument from NMIClass::nmi_monitor_handler()

Only s390x was using the 'cpu_index' argument, but since the previous commit it isn't anymore (it use the first cpu). Since this argument is now completely unused, remove it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20260812121232.71958-4-philmd@oss.qualcomm.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>

Philippe Mathieu-Daudé committed Feb 20, 2024 at 14:30 UTC 9dad341a527a8fea796ba07803f41819addbceec
10 files changed +16 -10
hw/core/nmi.c
+1 -1
@@ -40,7 +40,7 @@ static int do_nmi(Object *o, void *opaque)
40 NMIClass *nc = NMI_GET_CLASS(n);
41
42 ns->handled = true;
43 - nc->nmi_monitor_handler(n, ns->cpu_index, &ns->err);
43 + nc->nmi_monitor_handler(n, &ns->err);
44 if (ns->err) {
45 return -1;
46 }
hw/hppa/machine.c
+1 -1
@@ -829,7 +829,7 @@ static void hppa_machine_reset(MachineState *ms, ResetType type)
829 cpu[0]->env.cmdline_or_bootorder = 'c';
830 }
831
832 -static void hppa_nmi(NMIState *n, int cpu_index, Error **errp)
832 +static void hppa_nmi(NMIState *ns, Error **errp)
833 {
834 CPUState *cs;
835
hw/i386/x86.c
+1 -1
@@ -147,7 +147,7 @@ static const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms)
147 return ms->possible_cpus;
148 }
149
150 -static void x86_nmi(NMIState *n, int cpu_index, Error **errp)
150 +static void x86_nmi(NMIState *ns, Error **errp)
151 {
152 /* cpu index isn't used */
153 CPUState *cs;
hw/intc/m68k_irqc.c
+1 -1
@@ -70,7 +70,7 @@ static void m68k_irqc_instance_init(Object *obj)
70 qdev_init_gpio_in(DEVICE(obj), m68k_set_irq, M68K_IRQC_LEVEL_NUM);
71 }
72
73 -static void m68k_nmi(NMIState *n, int cpu_index, Error **errp)
73 +static void m68k_nmi(NMIState *n, Error **errp)
74 {
75 m68k_set_irq(n, M68K_IRQC_LEVEL_7, 1);
76 }
hw/m68k/q800-glue.c
+1 -1
@@ -159,7 +159,7 @@ static void glue_auxmode_set_irq(void *opaque, int irq, int level)
159 s->auxmode = level;
160 }
161
162 -static void glue_nmi(NMIState *n, int cpu_index, Error **errp)
162 +static void glue_nmi(NMIState *n, Error **errp)
163 {
164 GLUEState *s = GLUE(n);
165
hw/misc/macio/gpio.c
+1 -1
@@ -188,7 +188,7 @@ static void macio_gpio_reset(DeviceState *dev)
188 macio_set_gpio(s, 1, true);
189 }
190
191 -static void macio_gpio_nmi(NMIState *n, int cpu_index, Error **errp)
191 +static void macio_gpio_nmi(NMIState *n, Error **errp)
192 {
193 macio_set_gpio(MACIO_GPIO(n), 9, true);
194 macio_set_gpio(MACIO_GPIO(n), 9, false);
hw/ppc/pnv.c
+1 -1
@@ -3552,7 +3552,7 @@ static void pnv_cpu_do_nmi(PnvChip *chip, PowerPCCPU *cpu, void *opaque)
3552 async_run_on_cpu(CPU(cpu), pnv_cpu_do_nmi_on_cpu, RUN_ON_CPU_HOST_INT(0));
3553 }
3554
3555 -static void pnv_nmi(NMIState *n, int cpu_index, Error **errp)
3555 +static void pnv_nmi(NMIState *ns, Error **errp)
3556 {
3557 PnvMachineState *pnv = PNV_MACHINE(qdev_get_machine());
3558 int i;
hw/ppc/spapr.c
+1 -1
@@ -3550,7 +3550,7 @@ void spapr_do_system_reset_on_cpu(CPUState *cs, run_on_cpu_data arg)
3550 }
3551 }
3552
3553 -static void spapr_nmi(NMIState *n, int cpu_index, Error **errp)
3553 +static void spapr_nmi(NMIState *ns, Error **errp)
3554 {
3555 CPUState *cs;
3556
hw/s390x/s390-virtio-ccw.c
+1 -1
@@ -725,7 +725,7 @@ static HotplugHandler *s390_get_hotplug_handler(MachineState *machine,
725 return NULL;
726 }
727
728 -static void s390_nmi(NMIState *n, int cpu_index, Error **errp)
728 +static void s390_nmi(NMIState *ns, Error **errp)
729 {
730 s390_cpu_restart(S390_CPU(first_cpu));
731 }
include/hw/core/nmi.h
+7 -1
@@ -37,7 +37,13 @@ typedef struct NMIState NMIState;
37 struct NMIClass {
38 InterfaceClass parent_class;
39
40 - void (*nmi_monitor_handler)(NMIState *n, int cpu_index, Error **errp);
40 + /**
41 + * nmi_monitor_handler: Callback to handle NMI notifications.
42 + *
43 + * @ns: Class #NMIState state
44 + * @errp: pointer to error object
45 + */
46 + void (*nmi_monitor_handler)(NMIState *ns, Error **errp);
47 };
48
49 void nmi_monitor_handle(int cpu_index, Error **errp);