target/riscv: Move debug.h include away from cpu.h
All debug.h definitions except for RV_MAX_TRIGGERS are internal to target/riscv. Move RV_MAX_TRIGGERS to cpu.h and include debug.h from all translation units which relied on the cpu.h include. Signed-off-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20260520125406.28693-23-anjo@rev.ng> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Anton Johansson committed
May 20, 2026 at 14:54 UTC
9ebcec5cc4a7922433fd20fd360d050c4815faf9
7 files changed
+10
-4
target/riscv/cpu.c
+3
@@ -38,6 +38,9 @@
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#include "kvm/kvm_riscv.h"
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#include "tcg/tcg-cpu.h"
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#include "tcg/tcg.h"
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+#if !defined(CONFIG_USER_ONLY)
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+#include "target/riscv/debug.h"
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+#endif
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/* RISC-V CPU definitions */
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static const char riscv_single_letter_exts[] = "IEMAFDQCBPVH";
target/riscv/cpu.h
+1
-1
@@ -187,12 +187,12 @@ extern RISCVCPUImpliedExtsRule *riscv_multi_ext_implied_rules[];
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#if !defined(CONFIG_USER_ONLY)
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#include "pmp.h"
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-#include "debug.h"
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#endif
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#define RV_VLEN_MAX 1024
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#define RV_MAX_MHPMEVENTS 32
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#define RV_MAX_MHPMCOUNTERS 32
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+#define RV_MAX_TRIGGERS 2
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FIELD(VTYPE, VLMUL, 0, 3)
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FIELD(VTYPE, VSEW, 3, 3)
target/riscv/cpu_helper.c
+1
-1
@@ -34,7 +34,7 @@
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#include "semihosting/common-semi.h"
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#include "exec/icount.h"
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#include "cpu_bits.h"
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-#include "debug.h"
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+#include "target/riscv/debug.h"
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#include "pmp.h"
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#include "qemu/plugin.h"
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target/riscv/csr.c
+3
@@ -31,6 +31,9 @@
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#include "qapi/error.h"
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#include "tcg/insn-start-words.h"
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#include "internals.h"
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+#if !defined(CONFIG_USER_ONLY)
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+#include "target/riscv/debug.h"
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+#endif
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/* CSR function table public API */
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void riscv_get_csr_ops(int csrno, riscv_csr_operations *ops)
target/riscv/debug.c
+1
@@ -27,6 +27,7 @@
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#include "qemu/log.h"
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#include "qapi/error.h"
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#include "cpu.h"
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+#include "target/riscv/debug.h"
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#include "trace.h"
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#include "exec/helper-proto.h"
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#include "exec/watchpoint.h"
target/riscv/debug.h
-2
@@ -25,8 +25,6 @@
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#include "exec/breakpoint.h"
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#include "exec/target_long.h"
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-#define RV_MAX_TRIGGERS 2
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-
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/* register index of tdata CSRs */
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enum {
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TDATA1 = 0,
target/riscv/tcg/tcg-cpu.c
+1
@@ -37,6 +37,7 @@
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#include "hw/core/boards.h"
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#include "system/tcg.h"
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#include "exec/icount.h"
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+#include "target/riscv/debug.h"
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#endif
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/* Hash that stores user set extensions */