@samitouri / QOSamiQemu / commits / a2239a8733

hw/arm/aspeed: Do not realize 64-bit CPU types under QTest

aspeed_ast27x0.c models 2 similar SoC based on a 64-bit only CPU (Cortex-A35), only available in the 64-bit binary. If we build this file as common object, these SoCs become available in both 32 and 64-bit binaries; however when running the introspection test on the 32-bit binary, the init() method tries to init the Cortex-A35 type -- although not realizing it -- which is not available. Simply skip CPU initialization when running QTests on a 32-bit binary, asserting the realization step is not reached. Suggested-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20260526203722.79463-4-philmd@linaro.org>

Philippe Mathieu-Daudé committed May 13, 2026 at 14:04 UTC a2239a8733940aa32b07ea4ce895726bc04458a3

1 file changed +14

hw/arm/aspeed_ast27x0.c

+14

@@ -18,6 +18,7 @@

18 #include "qemu/error-report.h"

19 #include "hw/i2c/aspeed_i2c.h"

20 #include "net/net.h"

21 +#include "system/qtest.h"

22 #include "system/system.h"

23 #include "hw/intc/arm_gicv3.h"

24 #include "qobject/qlist.h"

@@ -419,6 +420,15 @@ static void aspeed_soc_ast2700_init(Object *obj)

420 }

421

422 for (i = 0; i < sc->num_cpus; i++) {

423 + if (qtest_enabled() && !target_aarch64()) {

424 + /*

425 + * Introspection qtest just want to create this object

426 + * without realizing it. ARM_CPU_TYPE_NAME("cortex-a35")

427 + * is not available on 32-bit binary: skip it since we

428 + * won't even realize it.

429 + */

430 + continue;

431 + }

432 object_initialize_child(obj, "cpu[*]", &a->cpu[i],

433 aspeed_soc_cpu_type(sc->valid_cpu_types));

434 }

@@ -693,6 +703,10 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)

703 qemu_irq irq;

704 int uart;

705

706 + if (qtest_enabled() && !target_aarch64()) {

707 + g_assert_not_reached();

708 + }

709 +

710 /* Default boot region (SPI memory or ROMs) */

711 memory_region_init(&s->spi_boot_container, OBJECT(s),

712 "aspeed.spi_boot_container", 0x400000000);