758
aic->reg_ops = &aspeed_intc_ops;
759
}
760
761
-static const TypeInfo aspeed_intc_info = {
762
- .name = TYPE_ASPEED_INTC,
763
- .parent = TYPE_SYS_BUS_DEVICE,
764
- .instance_init = aspeed_intc_instance_init,
765
- .instance_size = sizeof(AspeedINTCState),
766
- .class_init = aspeed_intc_class_init,
767
- .class_size = sizeof(AspeedINTCClass),
768
- .abstract = true,
769
-};
770
-
761
static AspeedINTCIRQ aspeed_2700_intc_irqs[ASPEED_INTC_MAX_INPINS] = {
762
{0, 0, 10, R_GICINT192_201_EN, R_GICINT192_201_STATUS},
763
};
778
aic->irq_table_count = ARRAY_SIZE(aspeed_2700_intc_irqs);
779
}
780
791
-static const TypeInfo aspeed_2700_intc_info = {
792
- .name = TYPE_ASPEED_2700_INTC,
793
- .parent = TYPE_ASPEED_INTC,
794
- .class_init = aspeed_2700_intc_class_init,
795
-};
796
-
781
static AspeedINTCIRQ aspeed_2700_intcioexp2_irqs[ASPEED_INTC_MAX_INPINS] = {
782
{0, 8, 1, R_GICINT192_EN, R_GICINT192_STATUS},
783
{1, 9, 1, R_GICINT193_EN, R_GICINT193_STATUS},
801
aic->irq_table_count = ARRAY_SIZE(aspeed_2700_intcioexp2_irqs);
802
}
803
820
-static const TypeInfo aspeed_2700_intcioexp2_info = {
821
- .name = TYPE_ASPEED_2700_INTCIOEXP2,
822
- .parent = TYPE_ASPEED_INTC,
823
- .class_init = aspeed_2700_intcioexp2_class_init,
824
-};
825
-
804
static AspeedINTCIRQ aspeed_2700_intcioexp1_irqs[ASPEED_INTC_MAX_INPINS] = {
805
{0, 6, 1, R_GICINT192_EN, R_GICINT192_STATUS},
806
{1, 7, 1, R_GICINT193_EN, R_GICINT193_STATUS},
824
aic->irq_table_count = ARRAY_SIZE(aspeed_2700_intcioexp1_irqs);
825
}
826
849
-static const TypeInfo aspeed_2700_intcioexp1_info = {
850
- .name = TYPE_ASPEED_2700_INTCIOEXP1,
851
- .parent = TYPE_ASPEED_INTC,
852
- .class_init = aspeed_2700_intcioexp1_class_init,
853
-};
854
-
827
static AspeedINTCIRQ aspeed_2700_intcio_irqs[ASPEED_INTC_MAX_INPINS] = {
828
{0, 0, 1, R_GICINT192_EN, R_GICINT192_STATUS},
829
{1, 1, 1, R_GICINT193_EN, R_GICINT193_STATUS},
850
aic->irq_table_count = ARRAY_SIZE(aspeed_2700_intcio_irqs);
851
}
852
881
-static const TypeInfo aspeed_2700_intcio_info = {
882
- .name = TYPE_ASPEED_2700_INTCIO,
883
- .parent = TYPE_ASPEED_INTC,
884
- .class_init = aspeed_2700_intcio_class_init,
885
-};
886
-
853
static AspeedINTCIRQ aspeed_2700ssp_intc_irqs[ASPEED_INTC_MAX_INPINS] = {
854
{0, 0, 10, R_SSPINT160_169_EN, R_SSPINT160_169_STATUS},
855
};
871
aic->irq_table_count = ARRAY_SIZE(aspeed_2700ssp_intc_irqs);
872
}
873
908
-static const TypeInfo aspeed_2700ssp_intc_info = {
909
- .name = TYPE_ASPEED_2700SSP_INTC,
910
- .parent = TYPE_ASPEED_INTC,
911
- .class_init = aspeed_2700ssp_intc_class_init,
912
-};
913
-
874
static AspeedINTCIRQ aspeed_2700ssp_intcio_irqs[ASPEED_INTC_MAX_INPINS] = {
875
{0, 0, 1, R_SSPINT160_EN, R_SSPINT160_STATUS},
876
{1, 1, 1, R_SSPINT161_EN, R_SSPINT161_STATUS},
898
aic->irq_table_count = ARRAY_SIZE(aspeed_2700ssp_intcio_irqs);
899
}
900
941
-static const TypeInfo aspeed_2700ssp_intcio_info = {
942
- .name = TYPE_ASPEED_2700SSP_INTCIO,
943
- .parent = TYPE_ASPEED_INTC,
944
- .class_init = aspeed_2700ssp_intcio_class_init,
945
-};
946
-
901
static AspeedINTCIRQ aspeed_2700tsp_intc_irqs[ASPEED_INTC_MAX_INPINS] = {
902
{0, 0, 10, R_TSPINT160_169_EN, R_TSPINT160_169_STATUS},
903
};
919
aic->irq_table_count = ARRAY_SIZE(aspeed_2700tsp_intc_irqs);
920
}
921
968
-static const TypeInfo aspeed_2700tsp_intc_info = {
969
- .name = TYPE_ASPEED_2700TSP_INTC,
970
- .parent = TYPE_ASPEED_INTC,
971
- .class_init = aspeed_2700tsp_intc_class_init,
972
-};
973
-
922
static AspeedINTCIRQ aspeed_2700tsp_intcio_irqs[ASPEED_INTC_MAX_INPINS] = {
923
{0, 0, 1, R_TSPINT160_EN, R_TSPINT160_STATUS},
924
{1, 1, 1, R_TSPINT161_EN, R_TSPINT161_STATUS},
946
aic->irq_table_count = ARRAY_SIZE(aspeed_2700tsp_intcio_irqs);
947
}
948
1001
-static const TypeInfo aspeed_2700tsp_intcio_info = {
1002
- .name = TYPE_ASPEED_2700TSP_INTCIO,
1003
- .parent = TYPE_ASPEED_INTC,
1004
- .class_init = aspeed_2700tsp_intcio_class_init,
949
+static const TypeInfo aspeed_intc_types[] = {
950
+ {
951
+ .name = TYPE_ASPEED_INTC,
952
+ .parent = TYPE_SYS_BUS_DEVICE,
953
+ .instance_init = aspeed_intc_instance_init,
954
+ .instance_size = sizeof(AspeedINTCState),
955
+ .class_init = aspeed_intc_class_init,
956
+ .class_size = sizeof(AspeedINTCClass),
957
+ .abstract = true,
958
+ },
959
+ {
960
+ .name = TYPE_ASPEED_2700_INTC,
961
+ .parent = TYPE_ASPEED_INTC,
962
+ .class_init = aspeed_2700_intc_class_init,
963
+ },
964
+ {
965
+ .name = TYPE_ASPEED_2700_INTCIO,
966
+ .parent = TYPE_ASPEED_INTC,
967
+ .class_init = aspeed_2700_intcio_class_init,
968
+ },
969
+ {
970
+ .name = TYPE_ASPEED_2700SSP_INTC,
971
+ .parent = TYPE_ASPEED_INTC,
972
+ .class_init = aspeed_2700ssp_intc_class_init,
973
+ },
974
+ {
975
+ .name = TYPE_ASPEED_2700SSP_INTCIO,
976
+ .parent = TYPE_ASPEED_INTC,
977
+ .class_init = aspeed_2700ssp_intcio_class_init,
978
+ },
979
+ {
980
+ .name = TYPE_ASPEED_2700TSP_INTC,
981
+ .parent = TYPE_ASPEED_INTC,
982
+ .class_init = aspeed_2700tsp_intc_class_init,
983
+ },
984
+ {
985
+ .name = TYPE_ASPEED_2700TSP_INTCIO,
986
+ .parent = TYPE_ASPEED_INTC,
987
+ .class_init = aspeed_2700tsp_intcio_class_init,
988
+ },
989
+ {
990
+ .name = TYPE_ASPEED_2700_INTCIOEXP1,
991
+ .parent = TYPE_ASPEED_INTC,
992
+ .class_init = aspeed_2700_intcioexp1_class_init,
993
+ },
994
+ {
995
+ .name = TYPE_ASPEED_2700_INTCIOEXP2,
996
+ .parent = TYPE_ASPEED_INTC,
997
+ .class_init = aspeed_2700_intcioexp2_class_init,
998
+ }
999
};
1000
1007
-static void aspeed_intc_register_types(void)
1008
-{
1009
- type_register_static(&aspeed_intc_info);
1010
- type_register_static(&aspeed_2700_intc_info);
1011
- type_register_static(&aspeed_2700_intcio_info);
1012
- type_register_static(&aspeed_2700_intcioexp1_info);
1013
- type_register_static(&aspeed_2700_intcioexp2_info);
1014
- type_register_static(&aspeed_2700ssp_intc_info);
1015
- type_register_static(&aspeed_2700ssp_intcio_info);
1016
- type_register_static(&aspeed_2700tsp_intc_info);
1017
- type_register_static(&aspeed_2700tsp_intcio_info);
1018
-}
1019
-
1020
-type_init(aspeed_intc_register_types);
1001
+DEFINE_TYPES(aspeed_intc_types)