target/i386/mshv: use arch_load/store_reg fns
Improved consistency around the naming of load/store register fn's. this is required since we want to roundtrip more registers in a migration than what's currently required for MMIO emulation. Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com> Link: https://lore.kernel.org/r/20260417105618.3621-2-magnuskulke@linux.microsoft.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Magnus Kulke committed
Apr 17, 2026 at 12:55 UTC
a6961182bc320b92a0f0537046d77cb9c928cc2a
3 files changed
+23
-37
accel/mshv/mshv-all.c
+1
-1
@@ -729,7 +729,7 @@ static void mshv_cpu_synchronize_pre_loadvm(CPUState *cpu)
729
static void do_mshv_cpu_synchronize(CPUState *cpu, run_on_cpu_data arg)
730
{
731
if (!cpu->accel->dirty) {
732
- int ret = mshv_load_regs(cpu);
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+ int ret = mshv_arch_load_regs(cpu);
733
if (ret < 0) {
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error_report("Failed to load registers for vcpu %d",
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cpu->cpu_index);
include/system/mshv_int.h
+2
-4
@@ -82,11 +82,9 @@ void mshv_init_mmio_emu(void);
82
int mshv_create_vcpu(int vm_fd, uint8_t vp_index, int *cpu_fd);
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void mshv_remove_vcpu(int vm_fd, int cpu_fd);
84
int mshv_configure_vcpu(const CPUState *cpu, const MshvFPU *fpu, uint64_t xcr0);
85
-int mshv_get_standard_regs(CPUState *cpu);
86
-int mshv_get_special_regs(CPUState *cpu);
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int mshv_run_vcpu(int vm_fd, CPUState *cpu, hv_message *msg, MshvVmExit *exit);
88
-int mshv_load_regs(CPUState *cpu);
89
-int mshv_store_regs(CPUState *cpu);
86
+int mshv_arch_load_regs(CPUState *cpu);
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+int mshv_arch_store_regs(CPUState *cpu);
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int mshv_set_generic_regs(const CPUState *cpu, const hv_register_assoc *assocs,
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size_t n_regs);
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int mshv_arch_put_registers(const CPUState *cpu);
target/i386/mshv/mshv-cpu.c
+20
-32
@@ -110,6 +110,8 @@ static enum hv_register_name FPU_REGISTER_NAMES[26] = {
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HV_X64_REGISTER_XMM_CONTROL_STATUS,
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};
112
113
+static int set_special_regs(const CPUState *cpu);
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+
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static int translate_gva(const CPUState *cpu, uint64_t gva, uint64_t *gpa,
116
uint64_t flags)
117
{
@@ -288,7 +290,7 @@ static int set_standard_regs(const CPUState *cpu)
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return 0;
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}
292
291
-int mshv_store_regs(CPUState *cpu)
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+int mshv_arch_store_regs(CPUState *cpu)
294
{
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int ret;
296
@@ -298,6 +300,12 @@ int mshv_store_regs(CPUState *cpu)
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return -1;
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}
302
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+ ret = set_special_regs(cpu);
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+ if (ret < 0) {
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+ error_report("Failed to store speical registers");
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+ return ret;
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+ }
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+
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return 0;
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}
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@@ -326,7 +334,7 @@ static void populate_standard_regs(const hv_register_assoc *assocs,
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rflags_to_lflags(env);
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}
336
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-int mshv_get_standard_regs(CPUState *cpu)
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+static int get_standard_regs(CPUState *cpu)
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{
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struct hv_register_assoc assocs[ARRAY_SIZE(STANDARD_REGISTER_NAMES)];
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int ret;
@@ -404,8 +412,7 @@ static void populate_special_regs(const hv_register_assoc *assocs,
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cpu_set_apic_base(x86cpu->apic_state, assocs[16].value.reg64);
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}
414
407
-
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-int mshv_get_special_regs(CPUState *cpu)
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+static int get_special_regs(CPUState *cpu)
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{
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struct hv_register_assoc assocs[ARRAY_SIZE(SPECIAL_REGISTER_NAMES)];
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int ret;
@@ -425,17 +432,17 @@ int mshv_get_special_regs(CPUState *cpu)
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return 0;
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}
434
428
-int mshv_load_regs(CPUState *cpu)
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+int mshv_arch_load_regs(CPUState *cpu)
436
{
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int ret;
438
432
- ret = mshv_get_standard_regs(cpu);
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+ ret = get_standard_regs(cpu);
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if (ret < 0) {
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error_report("Failed to load standard registers");
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return -1;
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}
444
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- ret = mshv_get_special_regs(cpu);
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+ ret = get_special_regs(cpu);
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if (ret < 0) {
447
error_report("Failed to load special registers");
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return -1;
@@ -1159,16 +1166,16 @@ static int emulate_instruction(CPUState *cpu,
1166
int ret;
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x86_insn_stream stream = { .bytes = insn_bytes, .len = insn_len };
1168
1162
- ret = mshv_load_regs(cpu);
1169
+ ret = mshv_arch_load_regs(cpu);
1170
if (ret < 0) {
1164
- error_report("failed to load registers");
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+ error_report("Failed to load registers");
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return -1;
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}
1174
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decode_instruction_stream(env, &decode, &stream);
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exec_instruction(env, &decode);
1177
1171
- ret = mshv_store_regs(cpu);
1178
+ ret = mshv_arch_store_regs(cpu);
1179
if (ret < 0) {
1180
error_report("failed to store registers");
1181
return -1;
@@ -1347,25 +1354,6 @@ static int handle_pio_non_str(const CPUState *cpu,
1354
return 0;
1355
}
1356
1350
-static int fetch_guest_state(CPUState *cpu)
1351
-{
1352
- int ret;
1353
-
1354
- ret = mshv_get_standard_regs(cpu);
1355
- if (ret < 0) {
1356
- error_report("Failed to get standard registers");
1357
- return -1;
1358
- }
1359
-
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- ret = mshv_get_special_regs(cpu);
1361
- if (ret < 0) {
1362
- error_report("Failed to get special registers");
1363
- return -1;
1364
- }
1365
-
1366
- return 0;
1367
-}
1368
-
1357
static int read_memory(const CPUState *cpu, uint64_t initial_gva,
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uint64_t initial_gpa, uint64_t gva, uint8_t *data,
1359
size_t len)
@@ -1485,9 +1473,9 @@ static int handle_pio_str(CPUState *cpu, hv_x64_io_port_intercept_message *info)
1473
X86CPU *x86_cpu = X86_CPU(cpu);
1474
CPUX86State *env = &x86_cpu->env;
1475
1488
- ret = fetch_guest_state(cpu);
1476
+ ret = mshv_arch_load_regs(cpu);
1477
if (ret < 0) {
1490
- error_report("Failed to fetch guest state");
1478
+ error_report("Failed to load registers");
1479
return -1;
1480
}
1481
@@ -1518,7 +1506,7 @@ static int handle_pio_str(CPUState *cpu, hv_x64_io_port_intercept_message *info)
1506
1507
ret = set_x64_registers(cpu, reg_names, reg_values);
1508
if (ret < 0) {
1521
- error_report("Failed to set x64 registers");
1509
+ error_report("Failed to set RIP and RAX registers");
1510
return -1;
1511
}
1512