Merge tag 'pull-hex-20260629' of https://github.com/qualcomm/qemu into staging

Hexagon system emulation - v5, including fixes for wasm build # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCgAdFiEEPWaq5HRZSCTIjOD4GlSvuOVkbDIFAmpCba0ACgkQGlSvuOVk # bDLIHBAAik+MeMPExm18BzauEw8tvJPFKmHIOgojPLOIjYAutZRhXrpxyQ02aeLz # e7pO0SE+JPmrmJFBU+MAGx8//Ag6MEF9wPKLIFn7T9QNDm2s+iBFYerVDZlvaN9j # 8W43hUcuzgdEWaoERKj34AemgtxctHHguhvFV5PimxDYyPq5S2rszwwtVUiXPYRt # aKhfaxllLth0sshVEvMky/uIJnimMfI8PR9Idm548wLLCZDYV74c20YmbLpX7Udk # EnYrk1AFcvp+3wZuFi9F+xhb3aGiAceTo5HOD2JAbVadHnU5vanyk33K2frfzri3 # vZurCVadC+Xt2cAG1MsnzkHlQ57utFZcwhcy/8kt5ap06/S693DS6oIVrntv5KJ3 # +3OCu7CT0BE0DDXbiAUakVU2L7UmfyXUGUPx5bcwLQNZT8eazVO0u2qwd0NHojG9 # Lw8uKbHw3Cnhyf7z4d6pZ3M10QYgQtLa1aSzewq1a5GV6gZhWbvJrKdnPYIPuxIv # Vm1AdCse02jmDRirESvktUTJwKpmNGwaLLQ/G2NJpSkj19H40uI69UU3zEfVyCC2 # LArVMhGbWic/r0cAzlTVcAQAamfdUEk7Jwf+I4ra7mS0aFEfQFnYmdE4vVcbT6A0 # b5wSnYLf6WIGWHZpZAmhJeKTGaqtQVoclVTKXTvKLpI9NnrsNtQ= # =mmde # -----END PGP SIGNATURE----- # gpg: Signature made Mon 29 Jun 2026 15:05:49 CEST # gpg: using RSA key 3D66AAE474594824C88CE0F81A54AFB8E5646C32 # gpg: Good signature from "Brian Cain (OSS Qualcomm) <brian.cain@oss.qualcomm.com>" [unknown] # gpg: aka "Brian Cain <bcain@kernel.org>" [unknown] # gpg: aka "Brian Cain (QuIC) <bcain@quicinc.com>" [unknown] # gpg: aka "Brian Cain (CAF) <bcain@codeaurora.org>" [unknown] # gpg: aka "bcain" [unknown] # gpg: aka "Brian Cain (QUIC) <quic_bcain@quicinc.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6350 20F9 67A7 7164 79EF 49E0 175C 464E 541B 6D47 # Subkey fingerprint: 3D66 AAE4 7459 4824 C88C E0F8 1A54 AFB8 E564 6C32 * tag 'pull-hex-20260629' of https://github.com/qualcomm/qemu: (77 commits) tests/qtest: Add hexagon boot-serial-test hw/hexagon: Define hexagon "virt" machine target/hexagon: add build config for softmmu hw/hexagon: Add support for cfgbase hw/hexagon: Add v68, sa8775-cdsp0 defs hw/hexagon: Add machine configs for sysemu hw/hexagon: Add hexagon TLB device implementation hw/hexagon: Add global register tracing hw/hexagon: Add globalreg model target/hexagon: Add guest reg reading functionality target/hexagon: Add support for loadw_phys target/hexagon: Add TCG overrides for transfer insts target/hexagon: Add PC to raise_exception, use fTRAP() helper target/hexagon: Add k0 {un,}lock target/hexagon: Define system, guest reg names target/hexagon: Add implicit sysreg writes target/hexagon: Add next_PC, {s,g}reg writes target/hexagon: Add pkt_ends_tb to translation target/hexagon: Implement modify_ssr, resched, pending_interrupt target/hexagon: Decode trap1, rte as COF ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>