hw/pci-host/q35.c: Factor out creation of SMRAM MRs
mch_realize has a large section that deals with initializing the SMRAM-specific MemoryRegions. Currently we do an early return from the realize function if mch->has_smm_ranges is false, but this has the potential for bugs if somebody adds new code at the end of the function that isn't SMM-specific. Pull the MR init code out into its own function, so we can do the smm-ranges specific handling in the realize function in a more obvious way. This commit shouldn't change behaviour at all. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Message-ID: <20260708121011.1653365-3-peter.maydell@linaro.org>
Peter Maydell committed
Jul 8, 2026 at 13:10 UTC
a90fcf0080da2bd372f0a79dc243d8d2ede1b244
1 file changed
+47
-44
hw/pci-host/q35.c
+47
-44
@@ -572,49 +572,9 @@ static void mch_reset(DeviceState *qdev)
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mch_update(mch);
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}
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-static void mch_realize(PCIDevice *d, Error **errp)
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+static void mch_init_smram_regions(MCHPCIState *mch)
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{
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- int i;
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- MCHPCIState *mch = MCH_PCI_DEVICE(d);
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-
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- if (mch->ext_tseg_mbytes > MCH_HOST_BRIDGE_EXT_TSEG_MBYTES_MAX) {
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- error_setg(errp, "invalid extended-tseg-mbytes value: %" PRIu16,
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- mch->ext_tseg_mbytes);
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- return;
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- }
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-
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- /* setup pci memory mapping */
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- pc_pci_as_mapping_init(mch->system_memory, mch->pci_address_space);
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-
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- /* PAM */
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- init_pam(&mch->pam_regions[0], OBJECT(mch), mch->ram_memory,
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- mch->system_memory, mch->pci_address_space,
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- PAM_BIOS_BASE, PAM_BIOS_SIZE);
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- for (i = 0; i < ARRAY_SIZE(mch->pam_regions) - 1; ++i) {
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- init_pam(&mch->pam_regions[i + 1], OBJECT(mch), mch->ram_memory,
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- mch->system_memory, mch->pci_address_space,
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- PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE, PAM_EXPAN_SIZE);
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- }
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-
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- /*
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- * This memory region looks like it's SMM specific, but it is not.
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- * It's an alias that makes the pci_address_space appear in system
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- * memory at the SMRAM_C_BASE address. The alias is enabled when the
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- * CPU should not see SMRAM, and *disabled* when the low SMRAM should be
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- * visible. So for non-SMM configs we need to create the alias, and
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- * leave it permanently enabled.
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- */
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- memory_region_init_alias(&mch->smram_region, OBJECT(mch), "smram-region",
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- mch->pci_address_space, MCH_HOST_BRIDGE_SMRAM_C_BASE,
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- MCH_HOST_BRIDGE_SMRAM_C_SIZE);
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- memory_region_add_subregion_overlap(mch->system_memory, MCH_HOST_BRIDGE_SMRAM_C_BASE,
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- &mch->smram_region, 1);
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- memory_region_set_enabled(&mch->smram_region, true);
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-
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- if (!mch->has_smm_ranges) {
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- return;
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- }
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-
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+ /* Initialize all the SMRAM specific MemoryRegions */
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memory_region_init_alias(&mch->open_high_smram, OBJECT(mch), "smram-open-high",
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mch->ram_memory, MCH_HOST_BRIDGE_SMRAM_C_BASE,
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MCH_HOST_BRIDGE_SMRAM_C_SIZE);
@@ -670,9 +630,52 @@ static void mch_realize(PCIDevice *d, Error **errp)
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memory_region_set_enabled(&mch->smbase_window, false);
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memory_region_add_subregion(&mch->smram, MCH_HOST_BRIDGE_SMBASE_ADDR,
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&mch->smbase_window);
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+}
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+
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+static void mch_realize(PCIDevice *d, Error **errp)
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+{
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+ int i;
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+ MCHPCIState *mch = MCH_PCI_DEVICE(d);
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+
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+ if (mch->ext_tseg_mbytes > MCH_HOST_BRIDGE_EXT_TSEG_MBYTES_MAX) {
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+ error_setg(errp, "invalid extended-tseg-mbytes value: %" PRIu16,
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+ mch->ext_tseg_mbytes);
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+ return;
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+ }
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+
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+ /* setup pci memory mapping */
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+ pc_pci_as_mapping_init(mch->system_memory, mch->pci_address_space);
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+
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+ /* PAM */
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+ init_pam(&mch->pam_regions[0], OBJECT(mch), mch->ram_memory,
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+ mch->system_memory, mch->pci_address_space,
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+ PAM_BIOS_BASE, PAM_BIOS_SIZE);
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+ for (i = 0; i < ARRAY_SIZE(mch->pam_regions) - 1; ++i) {
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+ init_pam(&mch->pam_regions[i + 1], OBJECT(mch), mch->ram_memory,
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+ mch->system_memory, mch->pci_address_space,
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+ PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE, PAM_EXPAN_SIZE);
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+ }
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- object_property_add_const_link(qdev_get_machine(), "smram",
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- OBJECT(&mch->smram));
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+ /*
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+ * This memory region looks like it's SMM specific, but it is not.
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+ * It's an alias that makes the pci_address_space appear in system
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+ * memory at the SMRAM_C_BASE address. The alias is enabled when the
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+ * CPU should not see SMRAM, and *disabled* when the low SMRAM should be
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+ * visible. So for non-SMM configs we need to create the alias, and
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+ * leave it permanently enabled.
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+ */
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+ memory_region_init_alias(&mch->smram_region, OBJECT(mch), "smram-region",
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+ mch->pci_address_space, MCH_HOST_BRIDGE_SMRAM_C_BASE,
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+ MCH_HOST_BRIDGE_SMRAM_C_SIZE);
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+ memory_region_add_subregion_overlap(mch->system_memory, MCH_HOST_BRIDGE_SMRAM_C_BASE,
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+ &mch->smram_region, 1);
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+ memory_region_set_enabled(&mch->smram_region, true);
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+
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+ if (mch->has_smm_ranges) {
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+ mch_init_smram_regions(mch);
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+ object_property_add_const_link(qdev_get_machine(), "smram",
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+ OBJECT(&mch->smram));
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+ }
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}
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static const Property mch_props[] = {