target/arm: Split out aarch32_max_tcg_init
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Message-id: 20260812204435.295067-6-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson committed
Aug 18, 2026 at 10:39 UTC
aa517d9774d63ffe41066e4c26c7540ee1625140
3 files changed
+17
-15
target/arm/cpu-max.c
+1
-15
@@ -202,22 +202,8 @@ static void cpu_max_initfn(Object *obj)
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}
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if (tcg_enabled()) {
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- /*
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- * '-cpu max' for TCG: we currently do this as
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- * "A57 with extra things"
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- */
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if (!aarch64_enabled) {
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- aarch64_aa32_a57_init(cpu, false);
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- aa32_max_features(cpu);
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-#ifdef CONFIG_USER_ONLY
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- /*
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- * Break with true ARMv8 and add back old-style VFP short-vector
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- * support. Only do this for user-mode, where -cpu max is the default,
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- * so that older v6 and v7 programs are more likely to work without
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- * adjustment.
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- */
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- cpu->isar.mvfr0 = FIELD_DP32(cpu->isar.mvfr0, MVFR0, FPSHVEC, 1);
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-#endif
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+ aarch32_max_tcg_init(cpu);
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} else {
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aarch64_max_tcg_initfn(obj);
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}
target/arm/internals.h
+1
@@ -1838,6 +1838,7 @@ uint32_t *arm_v7m_get_sp_ptr(CPUARMState *env, bool secure,
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bool el_is_in_host(CPUARMState *env, int el);
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void aa32_max_features(ARMCPU *cpu);
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+void aarch32_max_tcg_init(ARMCPU *cpu);
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int exception_target_el(CPUARMState *env);
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bool arm_singlestep_active(CPUARMState *env);
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bool arm_generate_debug_exceptions(CPUARMState *env);
target/arm/tcg/cpu32.c
+15
@@ -748,3 +748,18 @@ static void arm_tcg_cpu_register_types(void)
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type_init(arm_tcg_cpu_register_types)
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#endif /* !CONFIG_USER_ONLY || !TARGET_AARCH64 */
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+
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+void aarch32_max_tcg_init(ARMCPU *cpu)
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+{
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+ aarch64_aa32_a57_init(cpu, false);
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+ aa32_max_features(cpu);
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+#ifdef CONFIG_USER_ONLY
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+ /*
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+ * Break with true ARMv8 and add back old-style VFP short-vector
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+ * support. Only do this for user-mode, where -cpu max is the default,
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+ * so that older v6 and v7 programs are more likely to work without
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+ * adjustment.
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+ */
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+ cpu->isar.mvfr0 = FIELD_DP32(cpu->isar.mvfr0, MVFR0, FPSHVEC, 1);
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+#endif
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+}