gdbstub: Remove @g_pos argument in gdb_register_coprocessor()
gdb_register_coprocessor()'s @g_pos argument is always '0', meaning it is inferred from cpu->gdb_num_regs. Use instead feature->base_reg. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Link: https://lore.kernel.org/qemu-devel/20260310232045.58440-11-philmd@linaro.org Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Philippe Mathieu-Daudé committed
Mar 11, 2026 at 00:20 UTC
aa6a508795b5936336493cc628a27ad5dd45150f
13 files changed
+49
-83
gdbstub/gdbstub.c
+1
-9
@@ -616,7 +616,7 @@ void gdb_init_cpu(CPUState *cpu)
616
617
void gdb_register_coprocessor(CPUState *cpu,
618
gdb_get_reg_cb get_reg, gdb_set_reg_cb set_reg,
619
- const GDBFeature *feature, int g_pos)
619
+ const GDBFeature *feature)
620
{
621
GDBRegisterState *s;
622
guint i;
@@ -634,14 +634,6 @@ void gdb_register_coprocessor(CPUState *cpu,
634
635
/* Add to end of list. */
636
cpu->gdb_num_regs += feature->num_regs;
637
- if (g_pos) {
638
- if (g_pos != base_reg) {
639
- error_report("Error: Bad gdb register numbering for '%s', "
640
- "expected %d got %d", feature->xml, g_pos, base_reg);
641
- } else {
642
- cpu->gdb_num_g_regs = cpu->gdb_num_regs;
643
- }
644
- }
637
}
638
639
void gdb_unregister_coprocessor_all(CPUState *cpu)
include/exec/gdbstub.h
+1
-2
@@ -34,11 +34,10 @@ void gdb_init_cpu(CPUState *cpu);
34
* @set_reg - set function (gdb modifying)
35
* @num_regs - number of registers in set
36
* @xml - xml name of set
37
- * @gpos - non-zero to append to "general" register set at @gpos
37
*/
38
void gdb_register_coprocessor(CPUState *cpu,
39
gdb_get_reg_cb get_reg, gdb_set_reg_cb set_reg,
41
- const GDBFeature *feature, int g_pos);
40
+ const GDBFeature *feature);
41
42
/**
43
* gdb_unregister_coprocessor_all() - unregisters supplemental set of registers
target/arm/gdbstub.c
+8
-13
@@ -534,15 +534,13 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
534
} else {
535
if (arm_feature(env, ARM_FEATURE_NEON)) {
536
gdb_register_coprocessor(cs, vfp_gdb_get_reg, vfp_gdb_set_reg,
537
- gdb_find_static_feature("arm-neon.xml"),
538
- 0);
537
+ gdb_find_static_feature("arm-neon.xml"));
538
} else if (cpu_isar_feature(aa32_simd_r32, cpu)) {
539
gdb_register_coprocessor(cs, vfp_gdb_get_reg, vfp_gdb_set_reg,
541
- gdb_find_static_feature("arm-vfp3.xml"),
542
- 0);
540
+ gdb_find_static_feature("arm-vfp3.xml"));
541
} else if (cpu_isar_feature(aa32_vfp_simd, cpu)) {
542
gdb_register_coprocessor(cs, vfp_gdb_get_reg, vfp_gdb_set_reg,
545
- gdb_find_static_feature("arm-vfp.xml"), 0);
543
+ gdb_find_static_feature("arm-vfp.xml"));
544
}
545
if (!arm_feature(env, ARM_FEATURE_M)) {
546
/*
@@ -550,29 +548,26 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
548
* expose to gdb.
549
*/
550
gdb_register_coprocessor(cs, vfp_gdb_get_sysreg, vfp_gdb_set_sysreg,
553
- gdb_find_static_feature("arm-vfp-sysregs.xml"),
554
- 0);
551
+ gdb_find_static_feature("arm-vfp-sysregs.xml"));
552
}
553
}
554
if (cpu_isar_feature(aa32_mve, cpu) && tcg_enabled()) {
555
gdb_register_coprocessor(cs, mve_gdb_get_reg, mve_gdb_set_reg,
559
- gdb_find_static_feature("arm-m-profile-mve.xml"),
560
- 0);
556
+ gdb_find_static_feature("arm-m-profile-mve.xml"));
557
}
558
gdb_register_coprocessor(cs, arm_gdb_get_sysreg, arm_gdb_set_sysreg,
563
- arm_gen_dynamic_sysreg_feature(cs, cs->gdb_num_regs),
564
- 0);
559
+ arm_gen_dynamic_sysreg_feature(cs, cs->gdb_num_regs));
560
561
#ifdef CONFIG_TCG
562
if (arm_feature(env, ARM_FEATURE_M) && tcg_enabled()) {
563
gdb_register_coprocessor(cs,
564
arm_gdb_get_m_systemreg, arm_gdb_set_m_systemreg,
570
- arm_gen_dynamic_m_systemreg_feature(cs, cs->gdb_num_regs), 0);
565
+ arm_gen_dynamic_m_systemreg_feature(cs, cs->gdb_num_regs));
566
#ifndef CONFIG_USER_ONLY
567
if (arm_feature(env, ARM_FEATURE_M_SECURITY)) {
568
gdb_register_coprocessor(cs,
569
arm_gdb_get_m_secextreg, arm_gdb_set_m_secextreg,
575
- arm_gen_dynamic_m_secextreg_feature(cs, cs->gdb_num_regs), 0);
570
+ arm_gen_dynamic_m_secextreg_feature(cs, cs->gdb_num_regs));
571
}
572
#endif
573
}
target/arm/gdbstub64.c
+7
-12
@@ -887,24 +887,22 @@ void aarch64_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
887
isar_feature_aa64_sme(&cpu->isar)) {
888
GDBFeature *feature = arm_gen_dynamic_svereg_feature(cs, cs->gdb_num_regs);
889
gdb_register_coprocessor(cs, aarch64_gdb_get_sve_reg,
890
- aarch64_gdb_set_sve_reg, feature, 0);
890
+ aarch64_gdb_set_sve_reg, feature);
891
} else {
892
gdb_register_coprocessor(cs, aarch64_gdb_get_fpu_reg,
893
aarch64_gdb_set_fpu_reg,
894
- gdb_find_static_feature("aarch64-fpu.xml"),
895
- 0);
894
+ gdb_find_static_feature("aarch64-fpu.xml"));
895
}
896
897
if (isar_feature_aa64_sme(&cpu->isar)) {
898
GDBFeature *sme_feature =
899
arm_gen_dynamic_smereg_feature(cs, cs->gdb_num_regs);
900
gdb_register_coprocessor(cs, aarch64_gdb_get_sme_reg,
902
- aarch64_gdb_set_sme_reg, sme_feature, 0);
901
+ aarch64_gdb_set_sme_reg, sme_feature);
902
if (isar_feature_aa64_sme2(&cpu->isar)) {
903
gdb_register_coprocessor(cs, aarch64_gdb_get_sme2_reg,
904
aarch64_gdb_set_sme2_reg,
906
- gdb_find_static_feature("aarch64-sme2.xml"),
907
- 0);
905
+ gdb_find_static_feature("aarch64-sme2.xml"));
906
}
907
}
908
/*
@@ -916,8 +914,7 @@ void aarch64_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
914
if (isar_feature_aa64_pauth(&cpu->isar)) {
915
gdb_register_coprocessor(cs, aarch64_gdb_get_pauth_reg,
916
aarch64_gdb_set_pauth_reg,
919
- gdb_find_static_feature("aarch64-pauth.xml"),
920
- 0);
917
+ gdb_find_static_feature("aarch64-pauth.xml"));
918
}
919
920
#ifdef CONFIG_USER_ONLY
@@ -925,14 +922,12 @@ void aarch64_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
922
if (cpu_isar_feature(aa64_mte, cpu)) {
923
gdb_register_coprocessor(cs, aarch64_gdb_get_tag_ctl_reg,
924
aarch64_gdb_set_tag_ctl_reg,
928
- gdb_find_static_feature("aarch64-mte.xml"),
929
- 0);
925
+ gdb_find_static_feature("aarch64-mte.xml"));
926
}
927
#endif
928
929
/* All AArch64 CPUs have at least TPIDR */
930
gdb_register_coprocessor(cs, aarch64_gdb_get_tls_reg,
931
aarch64_gdb_set_tls_reg,
936
- arm_gen_dynamic_tls_feature(cs, cs->gdb_num_regs),
937
- 0);
932
+ arm_gen_dynamic_tls_feature(cs, cs->gdb_num_regs));
933
}
target/hexagon/cpu.c
+1
-1
@@ -322,7 +322,7 @@ static void hexagon_cpu_realize(DeviceState *dev, Error **errp)
322
323
gdb_register_coprocessor(cs, hexagon_hvx_gdb_read_register,
324
hexagon_hvx_gdb_write_register,
325
- gdb_find_static_feature("hexagon-hvx.xml"), 0);
325
+ gdb_find_static_feature("hexagon-hvx.xml"));
326
327
qemu_init_vcpu(cs);
328
cpu_reset(cs);
target/i386/gdbstub.c
+3
-5
@@ -501,8 +501,7 @@ void x86_cpu_gdb_init(CPUState *cs)
501
if (env->features[FEAT_7_1_EDX] & CPUID_7_1_EDX_APXF) {
502
gdb_register_coprocessor(cs, i386_cpu_gdb_get_egprs,
503
i386_cpu_gdb_set_egprs,
504
- gdb_find_static_feature("i386-64bit-apx.xml"),
505
- 0);
504
+ gdb_find_static_feature("i386-64bit-apx.xml"));
505
}
506
#endif
507
@@ -510,10 +509,9 @@ void x86_cpu_gdb_init(CPUState *cs)
509
gdb_register_coprocessor(cs, x86_cpu_gdb_read_linux_register,
510
x86_cpu_gdb_write_linux_register,
511
#ifdef TARGET_X86_64
513
- gdb_find_static_feature("i386-64bit-linux.xml"),
512
+ gdb_find_static_feature("i386-64bit-linux.xml"));
513
#else
515
- gdb_find_static_feature("i386-32bit-linux.xml"),
514
+ gdb_find_static_feature("i386-32bit-linux.xml"));
515
#endif
517
- 0);
516
#endif
517
}
target/loongarch/gdbstub.c
+3
-3
@@ -180,16 +180,16 @@ void loongarch_cpu_register_gdb_regs_for_features(CPUState *cs)
180
181
if (FIELD_EX32(env->cpucfg[2], CPUCFG2, FP)) {
182
gdb_register_coprocessor(cs, loongarch_gdb_get_fpu, loongarch_gdb_set_fpu,
183
- gdb_find_static_feature("loongarch-fpu.xml"), 0);
183
+ gdb_find_static_feature("loongarch-fpu.xml"));
184
}
185
186
if (FIELD_EX32(env->cpucfg[2], CPUCFG2, LSX)) {
187
gdb_register_coprocessor(cs, loongarch_gdb_get_lsx, loongarch_gdb_set_lsx,
188
- gdb_find_static_feature("loongarch-lsx.xml"), 0);
188
+ gdb_find_static_feature("loongarch-lsx.xml"));
189
}
190
191
if (FIELD_EX32(env->cpucfg[2], CPUCFG2, LASX)) {
192
gdb_register_coprocessor(cs, loongarch_gdb_get_lasx, loongarch_gdb_set_lasx,
193
- gdb_find_static_feature("loongarch-lasx.xml"), 0);
193
+ gdb_find_static_feature("loongarch-lasx.xml"));
194
}
195
}
target/m68k/helper.c
+2
-2
@@ -129,10 +129,10 @@ void m68k_cpu_init_gdb(M68kCPU *cpu)
129
130
if (m68k_feature(env, M68K_FEATURE_CF_FPU)) {
131
gdb_register_coprocessor(cs, cf_fpu_gdb_get_reg, cf_fpu_gdb_set_reg,
132
- gdb_find_static_feature("cf-fp.xml"), 0);
132
+ gdb_find_static_feature("cf-fp.xml"));
133
} else if (m68k_feature(env, M68K_FEATURE_FPU)) {
134
gdb_register_coprocessor(cs, m68k_fpu_gdb_get_reg, m68k_fpu_gdb_set_reg,
135
- gdb_find_static_feature("m68k-fp.xml"), 0);
135
+ gdb_find_static_feature("m68k-fp.xml"));
136
}
137
/* TODO: Add [E]MAC registers. */
138
}
target/microblaze/cpu.c
+1
-2
@@ -265,8 +265,7 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
265
266
gdb_register_coprocessor(cs, mb_cpu_gdb_read_stack_protect,
267
mb_cpu_gdb_write_stack_protect,
268
- gdb_find_static_feature("microblaze-stack-protect.xml"),
269
- 0);
268
+ gdb_find_static_feature("microblaze-stack-protect.xml"));
269
270
qemu_init_vcpu(cs);
271
target/ppc/gdbstub.c
+5
-6
@@ -502,24 +502,23 @@ void ppc_gdb_init(CPUState *cs, PowerPCCPUClass *pcc)
502
{
503
if (pcc->insns_flags & PPC_FLOAT) {
504
gdb_register_coprocessor(cs, gdb_get_float_reg, gdb_set_float_reg,
505
- gdb_find_static_feature("power-fpu.xml"), 0);
505
+ gdb_find_static_feature("power-fpu.xml"));
506
}
507
if (pcc->insns_flags & PPC_ALTIVEC) {
508
gdb_register_coprocessor(cs, gdb_get_avr_reg, gdb_set_avr_reg,
509
- gdb_find_static_feature("power-altivec.xml"),
510
- 0);
509
+ gdb_find_static_feature("power-altivec.xml"));
510
}
511
if (pcc->insns_flags & PPC_SPE) {
512
gdb_register_coprocessor(cs, gdb_get_spe_reg, gdb_set_spe_reg,
514
- gdb_find_static_feature("power-spe.xml"), 0);
513
+ gdb_find_static_feature("power-spe.xml"));
514
}
515
if (pcc->insns_flags2 & PPC2_VSX) {
516
gdb_register_coprocessor(cs, gdb_get_vsx_reg, gdb_set_vsx_reg,
518
- gdb_find_static_feature("power-vsx.xml"), 0);
517
+ gdb_find_static_feature("power-vsx.xml"));
518
}
519
#ifndef CONFIG_USER_ONLY
520
gdb_gen_spr_feature(cs);
521
gdb_register_coprocessor(cs, gdb_get_spr_reg, gdb_set_spr_reg,
523
- &pcc->gdb_spr, 0);
522
+ &pcc->gdb_spr);
523
#endif
524
}
target/riscv/gdbstub.c
+6
-12
@@ -348,32 +348,27 @@ void riscv_cpu_register_gdb_regs_for_features(CPUState *cs)
348
CPURISCVState *env = &cpu->env;
349
if (env->misa_ext & RVD) {
350
gdb_register_coprocessor(cs, riscv_gdb_get_fpu, riscv_gdb_set_fpu,
351
- gdb_find_static_feature("riscv-64bit-fpu.xml"),
352
- 0);
351
+ gdb_find_static_feature("riscv-64bit-fpu.xml"));
352
} else if (env->misa_ext & RVF) {
353
gdb_register_coprocessor(cs, riscv_gdb_get_fpu, riscv_gdb_set_fpu,
355
- gdb_find_static_feature("riscv-32bit-fpu.xml"),
356
- 0);
354
+ gdb_find_static_feature("riscv-32bit-fpu.xml"));
355
}
356
if (cpu->cfg.ext_zve32x) {
357
gdb_register_coprocessor(cs, riscv_gdb_get_vector,
358
riscv_gdb_set_vector,
361
- ricsv_gen_dynamic_vector_feature(cs, cs->gdb_num_regs),
362
- 0);
359
+ ricsv_gen_dynamic_vector_feature(cs, cs->gdb_num_regs));
360
}
361
switch (mcc->def->misa_mxl_max) {
362
case MXL_RV32:
363
gdb_register_coprocessor(cs, riscv_gdb_get_virtual,
364
riscv_gdb_set_virtual,
368
- gdb_find_static_feature("riscv-32bit-virtual.xml"),
369
- 0);
365
+ gdb_find_static_feature("riscv-32bit-virtual.xml"));
366
break;
367
case MXL_RV64:
368
case MXL_RV128:
369
gdb_register_coprocessor(cs, riscv_gdb_get_virtual,
370
riscv_gdb_set_virtual,
375
- gdb_find_static_feature("riscv-64bit-virtual.xml"),
376
- 0);
371
+ gdb_find_static_feature("riscv-64bit-virtual.xml"));
372
break;
373
default:
374
g_assert_not_reached();
@@ -381,7 +376,6 @@ void riscv_cpu_register_gdb_regs_for_features(CPUState *cs)
376
377
if (cpu->cfg.ext_zicsr) {
378
gdb_register_coprocessor(cs, riscv_gdb_get_csr, riscv_gdb_set_csr,
384
- riscv_gen_dynamic_csr_feature(cs, cs->gdb_num_regs),
385
- 0);
379
+ riscv_gen_dynamic_csr_feature(cs, cs->gdb_num_regs));
380
}
381
}
target/s390x/gdbstub.c
+7
-8
@@ -347,34 +347,33 @@ void s390_cpu_gdb_init(CPUState *cs)
347
{
348
gdb_register_coprocessor(cs, cpu_read_ac_reg,
349
cpu_write_ac_reg,
350
- gdb_find_static_feature("s390-acr.xml"), 0);
350
+ gdb_find_static_feature("s390-acr.xml"));
351
352
gdb_register_coprocessor(cs, cpu_read_fp_reg,
353
cpu_write_fp_reg,
354
- gdb_find_static_feature("s390-fpr.xml"), 0);
354
+ gdb_find_static_feature("s390-fpr.xml"));
355
356
gdb_register_coprocessor(cs, cpu_read_vreg,
357
cpu_write_vreg,
358
- gdb_find_static_feature("s390-vx.xml"), 0);
358
+ gdb_find_static_feature("s390-vx.xml"));
359
360
gdb_register_coprocessor(cs, cpu_read_gs_reg,
361
cpu_write_gs_reg,
362
- gdb_find_static_feature("s390-gs.xml"), 0);
362
+ gdb_find_static_feature("s390-gs.xml"));
363
364
#ifndef CONFIG_USER_ONLY
365
gdb_register_coprocessor(cs, cpu_read_c_reg,
366
cpu_write_c_reg,
367
- gdb_find_static_feature("s390-cr.xml"), 0);
367
+ gdb_find_static_feature("s390-cr.xml"));
368
369
gdb_register_coprocessor(cs, cpu_read_virt_reg,
370
cpu_write_virt_reg,
371
- gdb_find_static_feature("s390-virt.xml"), 0);
371
+ gdb_find_static_feature("s390-virt.xml"));
372
373
if (kvm_enabled()) {
374
gdb_register_coprocessor(cs, cpu_read_virt_kvm_reg,
375
cpu_write_virt_kvm_reg,
376
- gdb_find_static_feature("s390-virt-kvm.xml"),
377
- 0);
376
+ gdb_find_static_feature("s390-virt-kvm.xml"));
377
}
378
#endif
379
}
target/sparc/gdbstub.c
+4
-8
@@ -271,20 +271,16 @@ void sparc_cpu_register_gdb_regs(CPUState *cs)
271
#if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
272
gdb_register_coprocessor(cs, sparc_fpu_gdb_read_register,
273
sparc_fpu_gdb_write_register,
274
- gdb_find_static_feature("sparc32-fpu.xml"),
275
- 0);
274
+ gdb_find_static_feature("sparc32-fpu.xml"));
275
gdb_register_coprocessor(cs, sparc_cp0_gdb_read_register,
276
sparc_cp0_gdb_write_register,
278
- gdb_find_static_feature("sparc32-cp0.xml"),
279
- 0);
277
+ gdb_find_static_feature("sparc32-cp0.xml"));
278
#else
279
gdb_register_coprocessor(cs, sparc_fpu_gdb_read_register,
280
sparc_fpu_gdb_write_register,
283
- gdb_find_static_feature("sparc64-fpu.xml"),
284
- 0);
281
+ gdb_find_static_feature("sparc64-fpu.xml"));
282
gdb_register_coprocessor(cs, sparc_cp0_gdb_read_register,
283
sparc_cp0_gdb_write_register,
287
- gdb_find_static_feature("sparc64-cp0.xml"),
288
- 0);
284
+ gdb_find_static_feature("sparc64-cp0.xml"));
285
#endif
286
}