@samitouri / QOSamiQemu / commits / ab09c90248

target/arm: Implement FMLALL{BB,BT,TB,TT} for SVE

Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20260609192110.752384-33-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Richard Henderson committed Jun 9, 2026 at 12:20 UTC ab09c902481feedbba0d1932810b3c4eda674634
2 files changed +8
target/arm/tcg/sve.decode
+5
@@ -1868,6 +1868,8 @@ BFMLSLT_zzzw 01100100 11 1 ..... 10 1 00 1 ..... ..... @rda_rn_rm_ex esz=2
1868
1869 FMLAL_hb 01100100 10 1 rm:5 100 idxn:1 10 rn:5 rd:5 &rxx idxm=0
1870
1871 +FMLALL_sb 01100100 00 1 rm:5 10 idxn:2 10 rn:5 rd:5 &rxx idxm=0
1872 +
1873 ### SVE2 floating-point dot-product
1874 FDOT_zzzz 01100100 00 1 ..... 10 0 00 0 ..... ..... @rda_rn_rm_ex esz=2
1875 BFDOT_zzzz 01100100 01 1 ..... 10 0 00 0 ..... ..... @rda_rn_rm_ex esz=2
@@ -1887,6 +1889,9 @@ BFMLSLT_zzxw 01100100 11 1 ..... 0110.1 ..... ..... @rrxr_3a esz=2
1889 FMLAL_idx_hb 01100100 idxn:1 01 .. rm:3 0101 .. rn:5 rd:5 \
1890 &rxx idxm=%index4_19_10
1891
1892 +FMLALL_idx_sb 01100100 idxn:2 1 .. rm:3 1100 .. rn:5 rd:5 \
1893 + &rxx idxm=%index4_19_10
1894 +
1895 ### SVE2 floating-point dot-product (indexed)
1896
1897 FDOT_zzxz 01100100 00 1 ..... 010000 ..... ..... @rrxr_2 esz=2
target/arm/tcg/translate-sve.c
+3
@@ -8388,3 +8388,6 @@ static bool do_fmla_fp8(DisasContext *s, arg_rxx *a, gen_helper_gvec_3_ptr *fn)
8388
8389 TRANS(FMLAL_hb, do_fmla_fp8, a, gen_helper_gvec_fmla_hb)
8390 TRANS(FMLAL_idx_hb, do_fmla_fp8, a, gen_helper_gvec_fmla_idx_hb)
8391 +
8392 +TRANS(FMLALL_sb, do_fmla_fp8, a, gen_helper_gvec_fmla_sb)
8393 +TRANS(FMLALL_idx_sb, do_fmla_fp8, a, gen_helper_gvec_fmla_idx_sb)