@samitouri / QOSamiQemu / commits / abf1023d63

hw/cpu: Rename cpu_exec_realizefn() -> cpu_common_realize()

Keep cpu_common_*() pattern for publicly exposed common methods used by target code. Use cpu_exec_*() pattern for internal ones, mostly to distinct between system / user mode. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260811183410.22428-6-philmd@oss.qualcomm.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>

Philippe Mathieu-Daudé committed Aug 11, 2026 at 07:55 UTC abf1023d639ccc19f452e92e40a8b3e90e222958

24 files changed +29 -28

hw/core/cpu-common.c

+1 -1

@@ -230,7 +230,7 @@ const char *parse_cpu_option(const char *cpu_option)

230 return cpu_type;

231 }

232

233 -bool cpu_exec_realizefn(CPUState *cpu, Error **errp)

233 +bool cpu_common_realize(CPUState *cpu, Error **errp)

234 {

235 if (!accel_cpu_common_realize(cpu, errp)) {

236 return false;

include/hw/core/cpu.h

+2 -1

@@ -1178,7 +1178,8 @@ G_NORETURN void cpu_abort(CPUState *cpu, const char *fmt, ...)

1178 */

1179 void qemu_process_cpu_events(CPUState *cpu);

1180

1181 -bool cpu_exec_realizefn(CPUState *cpu, Error **errp);

1181 +/** cpu_common_realize: CPU DeviceRealize common handler */

1182 +bool cpu_common_realize(CPUState *cpu, Error **errp);

1183 void cpu_exec_unrealizefn(CPUState *cpu);

1184 void cpu_exec_reset_hold(CPUState *cpu);

1185

target/alpha/cpu.c

+1 -1

@@ -117,7 +117,7 @@ static void alpha_cpu_realizefn(DeviceState *dev, Error **errp)

117 cs->tcg_cflags |= CF_PCREL;

118 #endif

119

120 - cpu_exec_realizefn(cs, &local_err);

120 + cpu_common_realize(cs, &local_err);

121 if (local_err != NULL) {

122 error_propagate(errp, local_err);

123 return;

target/arm/cpu.c

+1 -1

@@ -1891,7 +1891,7 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)

1891 }

1892 #endif

1893

1894 - cpu_exec_realizefn(cs, &local_err);

1894 + cpu_common_realize(cs, &local_err);

1895 if (local_err != NULL) {

1896 error_propagate(errp, local_err);

1897 return;

target/avr/cpu.c

+1 -1

@@ -131,7 +131,7 @@ static void avr_cpu_realizefn(DeviceState *dev, Error **errp)

131 AVRCPUClass *mcc = AVR_CPU_GET_CLASS(dev);

132 Error *local_err = NULL;

133

134 - cpu_exec_realizefn(cs, &local_err);

134 + cpu_common_realize(cs, &local_err);

135 if (local_err != NULL) {

136 error_propagate(errp, local_err);

137 return;

target/hexagon/cpu.c

+1 -1

@@ -457,7 +457,7 @@ static void hexagon_cpu_realize(DeviceState *dev, Error **errp)

457 HexagonCPUClass *mcc = HEXAGON_CPU_GET_CLASS(dev);

458 Error *local_err = NULL;

459

460 - cpu_exec_realizefn(cs, &local_err);

460 + cpu_common_realize(cs, &local_err);

461 if (local_err != NULL) {

462 error_propagate(errp, local_err);

463 return;

target/hppa/cpu.c

+1 -1

@@ -181,7 +181,7 @@ static void hppa_cpu_realizefn(DeviceState *dev, Error **errp)

181 HPPACPUClass *acc = HPPA_CPU_GET_CLASS(dev);

182 Error *local_err = NULL;

183

184 - cpu_exec_realizefn(cs, &local_err);

184 + cpu_common_realize(cs, &local_err);

185 if (local_err != NULL) {

186 error_propagate(errp, local_err);

187 return;

target/i386/cpu.c

+5 -5

@@ -10164,7 +10164,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)

10164 * These may be set by the accel-specific code,

10165 * and the results are subsequently checked / assumed in this function.

10166 */

10167 - cpu_exec_realizefn(cs, &local_err);

10167 + cpu_common_realize(cs, &local_err);

10168 if (local_err != NULL) {

10169 error_propagate(errp, local_err);

10170 return;

@@ -10179,7 +10179,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)

10179 if (cpu->guest_phys_bits == -1) {

10180 /*

10181 * If it was not set by the user, or by the accelerator via

10182 - * cpu_exec_realizefn, clear.

10182 + * cpu_common_realize, clear.

10183 */

10184 cpu->guest_phys_bits = 0;

10185 }

@@ -10188,7 +10188,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)

10188 /*

10189 * The default is the same as KVM's. Note that this check

10190 * needs to happen after the evenual setting of ucode_rev in

10191 - * accel-specific code in cpu_exec_realizefn.

10191 + * accel-specific code in cpu_common_realize.

10192 */

10193 if (IS_AMD_CPU(env)) {

10194 cpu->ucode_rev = 0x01000065;

@@ -10201,7 +10201,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)

10201 * mwait extended info: needed for Core compatibility

10202 * We always wake on interrupt even if host does not have the capability.

10203 *

10204 - * requires the accel-specific code in cpu_exec_realizefn to

10204 + * requires the accel-specific code in cpu_common_realize to

10205 * have already acquired the CPUID data into cpu->mwait.

10206 */

10207 cpu->mwait.ecx |= CPUID_MWAIT_EMX | CPUID_MWAIT_IBE;

@@ -10230,7 +10230,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)

10230 * Note that this code assumes features expansion has already been done

10231 * (as it checks for CPUID_EXT2_LM), and also assumes that potential

10232 * phys_bits adjustments to match the host have been already done in

10233 - * accel-specific code in cpu_exec_realizefn.

10233 + * accel-specific code in cpu_common_realize.

10234 */

10235 if (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) {

10236 if (cpu->phys_bits && cpu->phys_bits < 32) {

target/i386/kvm/kvm-cpu.c

+1 -1

@@ -57,7 +57,7 @@ static bool kvm_cpu_realizefn(CPUState *cs, Error **errp)

57 *

58 * x86_cpu_realizefn():

59 * x86_cpu_expand_features()

60 - * cpu_exec_realizefn():

60 + * cpu_common_realize():

61 * accel_cpu_common_realize()

62 * kvm_cpu_realizefn()

63 * host_cpu_realizefn()

target/loongarch/cpu.c

+1 -1

@@ -704,7 +704,7 @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp)

704 LoongArchCPUClass *lacc = LOONGARCH_CPU_GET_CLASS(dev);

705 Error *local_err = NULL;

706

707 - cpu_exec_realizefn(cs, &local_err);

707 + cpu_common_realize(cs, &local_err);

708 if (local_err != NULL) {

709 error_propagate(errp, local_err);

710 return;

target/m68k/cpu.c

+1 -1

@@ -389,7 +389,7 @@ static void m68k_cpu_realizefn(DeviceState *dev, Error **errp)

389

390 register_m68k_insns(&cpu->env);

391

392 - cpu_exec_realizefn(cs, &local_err);

392 + cpu_common_realize(cs, &local_err);

393 if (local_err != NULL) {

394 error_propagate(errp, local_err);

395 return;

target/microblaze/cpu.c

+1 -1

@@ -251,7 +251,7 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)

251 int i = 0;

252 Error *local_err = NULL;

253

254 - cpu_exec_realizefn(cs, &local_err);

254 + cpu_common_realize(cs, &local_err);

255 if (local_err != NULL) {

256 error_propagate(errp, local_err);

257 return;

target/mips/cpu.c

+1 -1

@@ -544,7 +544,7 @@ static void mips_cpu_realizefn(DeviceState *dev, Error **errp)

544 }

545 mips_cp0_period_set(cpu);

546

547 - cpu_exec_realizefn(cs, &local_err);

547 + cpu_common_realize(cs, &local_err);

548 if (local_err != NULL) {

549 error_propagate(errp, local_err);

550 return;

target/or1k/cpu.c

+1 -1

@@ -170,7 +170,7 @@ static void openrisc_cpu_realizefn(DeviceState *dev, Error **errp)

170 OpenRISCCPUClass *occ = OPENRISC_CPU_GET_CLASS(dev);

171 Error *local_err = NULL;

172

173 - cpu_exec_realizefn(cs, &local_err);

173 + cpu_common_realize(cs, &local_err);

174 if (local_err != NULL) {

175 error_propagate(errp, local_err);

176 return;

target/ppc/cpu_init.c

+1 -1

@@ -6921,7 +6921,7 @@ static void ppc_cpu_realize(DeviceState *dev, Error **errp)

6921 PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);

6922 Error *local_err = NULL;

6923

6924 - cpu_exec_realizefn(cs, &local_err);

6924 + cpu_common_realize(cs, &local_err);

6925 if (local_err != NULL) {

6926 error_propagate(errp, local_err);

6927 return;

target/riscv/cpu.c

+1 -1

@@ -1226,7 +1226,7 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp)

1226 RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(dev);

1227 Error *local_err = NULL;

1228

1229 - cpu_exec_realizefn(cs, &local_err);

1229 + cpu_common_realize(cs, &local_err);

1230 if (local_err != NULL) {

1231 error_propagate(errp, local_err);

1232 return;

target/riscv/kvm/kvm-cpu.c

+1 -1

@@ -2006,7 +2006,7 @@ static void kvm_cpu_instance_init(CPUState *cs)

2006 * We'll get here via the following path:

2007 *

2008 * riscv_cpu_realize()

2009 - * -> cpu_exec_realizefn()

2009 + * -> cpu_common_realize()

2010 * -> kvm_cpu_realize() (via accel_cpu_common_realize())

2011 */

2012 static bool kvm_cpu_realize(CPUState *cs, Error **errp)

target/riscv/tcg/tcg-cpu.c

+1 -1

@@ -1304,7 +1304,7 @@ static void riscv_cpu_set_profile(RISCVCPU *cpu,

1304 * We'll get here via the following path:

1305 *

1306 * riscv_cpu_realize()

1307 - * -> cpu_exec_realizefn()

1307 + * -> cpu_common_realize()

1308 * -> tcg_cpu_realize() (via accel_cpu_common_realize())

1309 */

1310 static bool riscv_tcg_cpu_realize(CPUState *cs, Error **errp)

target/rx/cpu.c

+1 -1

@@ -147,7 +147,7 @@ static void rx_cpu_realize(DeviceState *dev, Error **errp)

147 RXCPUClass *rcc = RX_CPU_GET_CLASS(dev);

148 Error *local_err = NULL;

149

150 - cpu_exec_realizefn(cs, &local_err);

150 + cpu_common_realize(cs, &local_err);

151 if (local_err != NULL) {

152 error_propagate(errp, local_err);

153 return;

target/s390x/cpu.c

+1 -1

@@ -249,7 +249,7 @@ static void s390_cpu_realizefn(DeviceState *dev, Error **errp)

249 }

250 #endif

251

252 - cpu_exec_realizefn(cs, &err);

252 + cpu_common_realize(cs, &err);

253 if (err != NULL) {

254 goto out;

255 }

target/sh4/cpu.c

+1 -1

@@ -250,7 +250,7 @@ static void superh_cpu_realizefn(DeviceState *dev, Error **errp)

250 SuperHCPUClass *scc = SUPERH_CPU_GET_CLASS(dev);

251 Error *local_err = NULL;

252

253 - cpu_exec_realizefn(cs, &local_err);

253 + cpu_common_realize(cs, &local_err);

254 if (local_err != NULL) {

255 error_propagate(errp, local_err);

256 return;

target/sparc/cpu.c

+1 -1

@@ -892,7 +892,7 @@ static void sparc_cpu_realizefn(DeviceState *dev, Error **errp)

892 /* Default NaN value: sign bit clear, all frac bits set */

893 set_float_default_nan_pattern(0b01111111, &env->fp_status);

894

895 - cpu_exec_realizefn(cs, &local_err);

895 + cpu_common_realize(cs, &local_err);

896 if (local_err != NULL) {

897 error_propagate(errp, local_err);

898 return;

target/tricore/cpu.c

+1 -1

@@ -99,7 +99,7 @@ static void tricore_cpu_realizefn(DeviceState *dev, Error **errp)

99 CPUTriCoreState *env = &cpu->env;

100 Error *local_err = NULL;

101

102 - cpu_exec_realizefn(cs, &local_err);

102 + cpu_common_realize(cs, &local_err);

103 if (local_err != NULL) {

104 error_propagate(errp, local_err);

105 return;

target/xtensa/cpu.c

+1 -1

@@ -257,7 +257,7 @@ static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp)

257 xtensa_irq_init(&XTENSA_CPU(dev)->env);

258 #endif

259

260 - cpu_exec_realizefn(cs, &local_err);

260 + cpu_common_realize(cs, &local_err);

261 if (local_err != NULL) {

262 error_propagate(errp, local_err);

263 return;