@samitouri / QOSamiQemu / commits / ad6c7552a6

target/riscv: Use float_raise

Use float_raise instead of open coding it. Signed-off-by: Anton Blanchard <antonb@tenstorrent.com> Reviewed-by: Chao Liu <chao.liu.zevorn@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Max Chou <max.chou@sifive.com> Message-ID: <20260521110824.1091323-1-antonb@tenstorrent.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Anton Blanchard committed May 21, 2026 at 11:08 UTC ad6c7552a63632fdfba04936a2222f376e22195b
1 file changed +17 -18
target/riscv/vector_helper.c
+17 -18
@@ -4084,7 +4084,7 @@ static bfloat16 frsqrt7_h_bf16(bfloat16 f, float_status *s)
4084 (bfloat16_is_infinity(f) && sign) ||
4085 (bfloat16_is_normal(f) && sign) ||
4086 (bfloat16_is_zero_or_denormal(f) && !bfloat16_is_zero(f) && sign)) {
4087 - s->float_exception_flags |= float_flag_invalid;
4087 + float_raise(float_flag_invalid, s);
4088 return bfloat16_default_nan(s);
4089 }
4090
@@ -4095,7 +4095,7 @@ static bfloat16 frsqrt7_h_bf16(bfloat16 f, float_status *s)
4095
4096 /* frsqrt7(+-0) = +-inf */
4097 if (bfloat16_is_zero(f)) {
4098 - s->float_exception_flags |= float_flag_divbyzero;
4098 + float_raise(float_flag_divbyzero, s);
4099 return bfloat16_set_sign(bfloat16_infinity, sign);
4100 }
4101
@@ -4124,7 +4124,7 @@ static float16 frsqrt7_h(float16 f, float_status *s)
4124 (float16_is_infinity(f) && sign) ||
4125 (float16_is_normal(f) && sign) ||
4126 (float16_is_zero_or_denormal(f) && !float16_is_zero(f) && sign)) {
4127 - s->float_exception_flags |= float_flag_invalid;
4127 + float_raise(float_flag_invalid, s);
4128 return float16_default_nan(s);
4129 }
4130
@@ -4135,7 +4135,7 @@ static float16 frsqrt7_h(float16 f, float_status *s)
4135
4136 /* frsqrt7(+-0) = +-inf */
4137 if (float16_is_zero(f)) {
4138 - s->float_exception_flags |= float_flag_divbyzero;
4138 + float_raise(float_flag_divbyzero, s);
4139 return float16_set_sign(float16_infinity, sign);
4140 }
4141
@@ -4164,7 +4164,7 @@ static float32 frsqrt7_s(float32 f, float_status *s)
4164 (float32_is_infinity(f) && sign) ||
4165 (float32_is_normal(f) && sign) ||
4166 (float32_is_zero_or_denormal(f) && !float32_is_zero(f) && sign)) {
4167 - s->float_exception_flags |= float_flag_invalid;
4167 + float_raise(float_flag_invalid, s);
4168 return float32_default_nan(s);
4169 }
4170
@@ -4175,7 +4175,7 @@ static float32 frsqrt7_s(float32 f, float_status *s)
4175
4176 /* frsqrt7(+-0) = +-inf */
4177 if (float32_is_zero(f)) {
4178 - s->float_exception_flags |= float_flag_divbyzero;
4178 + float_raise(float_flag_divbyzero, s);
4179 return float32_set_sign(float32_infinity, sign);
4180 }
4181
@@ -4204,7 +4204,7 @@ static float64 frsqrt7_d(float64 f, float_status *s)
4204 (float64_is_infinity(f) && sign) ||
4205 (float64_is_normal(f) && sign) ||
4206 (float64_is_zero_or_denormal(f) && !float64_is_zero(f) && sign)) {
4207 - s->float_exception_flags |= float_flag_invalid;
4207 + float_raise(float_flag_invalid, s);
4208 return float64_default_nan(s);
4209 }
4210
@@ -4215,7 +4215,7 @@ static float64 frsqrt7_d(float64 f, float_status *s)
4215
4216 /* frsqrt7(+-0) = +-inf */
4217 if (float64_is_zero(f)) {
4218 - s->float_exception_flags |= float_flag_divbyzero;
4218 + float_raise(float_flag_divbyzero, s);
4219 return float64_set_sign(float64_infinity, sign);
4220 }
4221
@@ -4285,8 +4285,7 @@ static uint64_t frec7(uint64_t f, int exp_size, int frac_size,
4285 * Overflow to inf or max value of same sign,
4286 * depending on sign and rounding mode.
4287 */
4288 - s->float_exception_flags |= (float_flag_inexact |
4289 - float_flag_overflow);
4288 + float_raise(float_flag_inexact | float_flag_overflow, s);
4289
4290 if ((get_float_rounding_mode(s) == float_round_to_zero) ||
4291 ((get_float_rounding_mode(s) == float_round_down) && !sign) ||
@@ -4338,13 +4337,13 @@ static bfloat16 frec7_h_bf16(bfloat16 f, float_status *s)
4337
4338 /* frec7(+-0) = +-inf */
4339 if (bfloat16_is_zero(f)) {
4341 - s->float_exception_flags |= float_flag_divbyzero;
4340 + float_raise(float_flag_divbyzero, s);
4341 return bfloat16_set_sign(bfloat16_infinity, sign);
4342 }
4343
4344 /* frec7(sNaN) = canonical NaN */
4345 if (bfloat16_is_signaling_nan(f, s)) {
4347 - s->float_exception_flags |= float_flag_invalid;
4346 + float_raise(float_flag_invalid, s);
4347 return bfloat16_default_nan(s);
4348 }
4349
@@ -4370,13 +4369,13 @@ static float16 frec7_h(float16 f, float_status *s)
4369
4370 /* frec7(+-0) = +-inf */
4371 if (float16_is_zero(f)) {
4373 - s->float_exception_flags |= float_flag_divbyzero;
4372 + float_raise(float_flag_divbyzero, s);
4373 return float16_set_sign(float16_infinity, sign);
4374 }
4375
4376 /* frec7(sNaN) = canonical NaN */
4377 if (float16_is_signaling_nan(f, s)) {
4379 - s->float_exception_flags |= float_flag_invalid;
4378 + float_raise(float_flag_invalid, s);
4379 return float16_default_nan(s);
4380 }
4381
@@ -4402,13 +4401,13 @@ static float32 frec7_s(float32 f, float_status *s)
4401
4402 /* frec7(+-0) = +-inf */
4403 if (float32_is_zero(f)) {
4405 - s->float_exception_flags |= float_flag_divbyzero;
4404 + float_raise(float_flag_divbyzero, s);
4405 return float32_set_sign(float32_infinity, sign);
4406 }
4407
4408 /* frec7(sNaN) = canonical NaN */
4409 if (float32_is_signaling_nan(f, s)) {
4411 - s->float_exception_flags |= float_flag_invalid;
4410 + float_raise(float_flag_invalid, s);
4411 return float32_default_nan(s);
4412 }
4413
@@ -4434,13 +4433,13 @@ static float64 frec7_d(float64 f, float_status *s)
4433
4434 /* frec7(+-0) = +-inf */
4435 if (float64_is_zero(f)) {
4437 - s->float_exception_flags |= float_flag_divbyzero;
4436 + float_raise(float_flag_divbyzero, s);
4437 return float64_set_sign(float64_infinity, sign);
4438 }
4439
4440 /* frec7(sNaN) = canonical NaN */
4441 if (float64_is_signaling_nan(f, s)) {
4443 - s->float_exception_flags |= float_flag_invalid;
4442 + float_raise(float_flag_invalid, s);
4443 return float64_default_nan(s);
4444 }
4445