target/arm: Implement FMOP4 (widening, 2-way fp16 to fp32)
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20260702204314.79224-7-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson committed
Jul 2, 2026 at 13:43 UTC
ae1e896a599847f53da33bf3c7ef211fcdafa346
4 files changed
+63
target/arm/tcg/helper-sme-defs.h
+4
@@ -375,3 +375,7 @@ DEF_HELPER_FLAGS_5(sme_ah_bfmop4s_hh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, fpst
375
DEF_HELPER_FLAGS_5(sme_bfmop4a_sh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, env, i32)
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DEF_HELPER_FLAGS_5(sme_bfmop4s_sh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, env, i32)
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DEF_HELPER_FLAGS_5(sme_ah_bfmop4s_sh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, env, i32)
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+
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+DEF_HELPER_FLAGS_5(sme_fmop4a_sh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, env, i32)
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+DEF_HELPER_FLAGS_5(sme_fmop4s_sh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, env, i32)
381
+DEF_HELPER_FLAGS_5(sme_ah_fmop4s_sh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, env, i32)
target/arm/tcg/sme.decode
+1
@@ -1107,3 +1107,4 @@ FMOP4_ss 1000 0000 000. ...0 0000 00.. ..0. 00.. @mop4_o2
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FMOP4_dd 1000 0000 110. ...0 0000 00.. ..0. 1... @mop4_o3
1108
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BFMOP4_sh 1000 0001 000. ...0 0000 00.. ..0. 00.. @mop4_o2
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+FMOP4_sh 1000 0001 001. ...0 0000 00.. ..0. 00.. @mop4_o2
target/arm/tcg/sme_helper.c
+51
@@ -2887,3 +2887,54 @@ void HELPER(sme_ah_bfmop4s_sh)(void *vza, void *vzn, void *vzm,
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is_ebf(env, &fpst) ? inner_ebf_ah_bfmop4s_sh
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: inner_ah_bfmop4s_sh);
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}
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+
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+static void inner_fmop4a_sh(void *vd, void *vn, void *vm, void *vinfo)
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+{
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+ float32 *d = vd;
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+ uint32_t *n = vn, *m = vm;
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+ CPUArchState *env = vinfo;
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+
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+ *d = f16_dotadd(*d, *n, *m,
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+ &env->vfp.fp_status[FPST_ZA_F16],
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+ &env->vfp.fp_status[FPST_ZA]);
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+}
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+
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+void HELPER(sme_fmop4a_sh)(void *vza, void *vzn, void *vzm,
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+ CPUArchState *env, uint32_t desc)
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+{
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+ sme_mop4(vza, vzn, vzm, env, desc, sizeof(float32), inner_fmop4a_sh);
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+}
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+
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+static void inner_fmop4s_sh(void *vd, void *vn, void *vm, void *vinfo)
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+{
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+ float32 *d = vd;
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+ uint32_t *n = vn, *m = vm;
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+ CPUArchState *env = vinfo;
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+
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+ *d = f16_dotadd(*d, *n ^ 0x80008000u, *m,
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+ &env->vfp.fp_status[FPST_ZA_F16],
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+ &env->vfp.fp_status[FPST_ZA]);
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+}
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+
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+void HELPER(sme_fmop4s_sh)(void *vza, void *vzn, void *vzm,
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+ CPUArchState *env, uint32_t desc)
2921
+{
2922
+ sme_mop4(vza, vzn, vzm, env, desc, sizeof(float32), inner_fmop4s_sh);
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+}
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+
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+static void inner_ah_fmop4s_sh(void *vd, void *vn, void *vm, void *vinfo)
2926
+{
2927
+ float32 *d = vd;
2928
+ uint32_t *n = vn, *m = vm;
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+ CPUArchState *env = vinfo;
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+
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+ *d = f16_dotadd(*d, f16mop_ah_neg_adj_pair(*n, -1), *m,
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+ &env->vfp.fp_status[FPST_ZA_F16],
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+ &env->vfp.fp_status[FPST_ZA]);
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+}
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+
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+void HELPER(sme_ah_fmop4s_sh)(void *vza, void *vzn, void *vzm,
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+ CPUArchState *env, uint32_t desc)
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+{
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+ sme_mop4(vza, vzn, vzm, env, desc, sizeof(float32), inner_ah_fmop4s_sh);
2940
+}
target/arm/tcg/translate-sme.c
+7
@@ -2065,3 +2065,10 @@ static gen_helper_gvec_3_ptr * const bfmop4_sh[3] = {
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gen_helper_sme_ah_bfmop4s_sh
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};
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TRANS_FEAT(BFMOP4_sh, aa64_sme_mop4, do_mop4_fp, a, MO_32, FPST_ENV, bfmop4_sh)
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+
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+static gen_helper_gvec_3_ptr * const fmop4_sh[3] = {
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+ gen_helper_sme_fmop4a_sh,
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+ gen_helper_sme_fmop4s_sh,
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+ gen_helper_sme_ah_fmop4s_sh
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+};
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+TRANS_FEAT(FMOP4_sh, aa64_sme_mop4, do_mop4_fp, a, MO_32, FPST_ENV, fmop4_sh)