@samitouri / QOSamiQemu / commits / aedd831f41

hw/riscv/sifive_u.c: add cpu-map, cluster and core DTs

We want to consolidate the CPU socket FDT creation into a single helper. 'virt' and spike has the same code but sifive_u does not have cpu-map, cluster and core subnodes. These subnodes are present in other boards even in single socket configs without NUMA. This is a strong indicator that their presence doesn't hurt a NUMA-less board like sifive_u. Add these DTs to make the FDT standardization straightforward. Signed-off-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20260615203734.954428-9-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

Daniel Henrique Barboza committed Jun 15, 2026 at 17:37 UTC aedd831f41bd63ca86828602c3b95447fde49a2e
1 file changed +12
hw/riscv/sifive_u.c
+12
@@ -109,6 +109,7 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap,
109 "sifive,plic-1.0.0", "riscv,plic0"
110 };
111 g_autofree uint32_t *intc_phandles = g_new0(uint32_t, ms->smp.cpus);
112 + g_autofree char *clust_name = NULL;
113
114 fdt = ms->fdt = create_board_device_tree("SiFive HiFive Unleashed A00",
115 "sifive,hifive-unleashed-a00", &s->fdt_size);
@@ -143,11 +144,17 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap,
144 CLINT_TIMEBASE_FREQ);
145 qemu_fdt_setprop_cell(fdt, "/cpus", "#size-cells", 0x0);
146 qemu_fdt_setprop_cell(fdt, "/cpus", "#address-cells", 0x1);
147 + qemu_fdt_add_subnode(fdt, "/cpus/cpu-map");
148 +
149 + clust_name = g_strdup_printf("/cpus/cpu-map/cluster%d", 0);
150 + qemu_fdt_add_subnode(fdt, clust_name);
151
152 for (cpu = ms->smp.cpus - 1; cpu >= 0; cpu--) {
153 int cpu_phandle = phandle++;
154 nodename = g_strdup_printf("/cpus/cpu@%d", cpu);
155 char *intc = g_strdup_printf("/cpus/cpu@%d/interrupt-controller", cpu);
156 + g_autofree char *core_name = NULL;
157 +
158 qemu_fdt_add_subnode(fdt, nodename);
159 /* cpu 0 is the management hart that does not have mmu */
160 if (cpu != 0) {
@@ -173,6 +180,11 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap,
180 qemu_fdt_setprop_string(fdt, intc, "compatible", "riscv,cpu-intc");
181 qemu_fdt_setprop(fdt, intc, "interrupt-controller", NULL, 0);
182 qemu_fdt_setprop_cell(fdt, intc, "#interrupt-cells", 1);
183 +
184 + core_name = g_strdup_printf("%s/core%d", clust_name, cpu);
185 + qemu_fdt_add_subnode(fdt, core_name);
186 + qemu_fdt_setprop_cell(fdt, core_name, "cpu", cpu_phandle);
187 +
188 g_free(intc);
189 g_free(nodename);
190 }