target/arm: Remove DO_ZPZZ_FP_B16 from translate-sme.c
Expand the macro at each use site. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20260826174213.614571-8-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson committed
Aug 26, 2026 at 10:41 UTC
b1215856fb0d03e9454cfb2f3bbdd9d4bc990e5a
1 file changed
+46
-13
target/arm/tcg/translate-sve.c
+46
-13
@@ -4438,14 +4438,6 @@ TRANS_FEAT_NONSTREAMING(FTSMUL, aa64_sve, gen_gvec_fpst_arg_zzz,
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s->fpcr_ah ? name##_ah_zpzz_fns[a->esz] : \
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name##_zpzz_fns[a->esz], a)
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-/* Similar, but for insns where sz == 0 encodes bfloat16 */
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-#define DO_ZPZZ_FP_B16(NAME, FEAT, name) \
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- static gen_helper_gvec_4_ptr * const name##_zpzz_fns[4] = { \
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- gen_helper_##name##_b16, gen_helper_##name##_h, \
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- gen_helper_##name##_s, gen_helper_##name##_d \
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- }; \
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- TRANS_FEAT(NAME, FEAT, gen_gvec_fpst_arg_zpzz, name##_zpzz_fns[a->esz], a)
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-
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#define DO_ZPZZ_AH_FP_B16(NAME, FEAT, name, ah_name) \
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static gen_helper_gvec_4_ptr * const name##_zpzz_fns[4] = { \
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gen_helper_##name##_b16, gen_helper_##name##_h, \
@@ -4459,13 +4451,54 @@ TRANS_FEAT_NONSTREAMING(FTSMUL, aa64_sve, gen_gvec_fpst_arg_zzz,
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s->fpcr_ah ? name##_ah_zpzz_fns[a->esz] : \
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name##_zpzz_fns[a->esz], a)
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-DO_ZPZZ_FP_B16(FADD_zpzz, aa64_sme_or_sve, sve_fadd)
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-DO_ZPZZ_FP_B16(FSUB_zpzz, aa64_sme_or_sve, sve_fsub)
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-DO_ZPZZ_FP_B16(FMUL_zpzz, aa64_sme_or_sve, sve_fmul)
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+static gen_helper_gvec_4_ptr * const sve_fadd_zpzz_fns[4] = {
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+ gen_helper_sve_fadd_b16,
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+ gen_helper_sve_fadd_h,
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+ gen_helper_sve_fadd_s,
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+ gen_helper_sve_fadd_d
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+};
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+TRANS_FEAT(FADD_zpzz, aa64_sme_or_sve, gen_gvec_fpst_arg_zpzz,
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+ sve_fadd_zpzz_fns[a->esz], a)
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+
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+static gen_helper_gvec_4_ptr * const sve_fsub_zpzz_fns[4] = {
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+ gen_helper_sve_fsub_b16,
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+ gen_helper_sve_fsub_h,
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+ gen_helper_sve_fsub_s,
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+ gen_helper_sve_fsub_d
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+};
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+TRANS_FEAT(FSUB_zpzz, aa64_sme_or_sve, gen_gvec_fpst_arg_zpzz,
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+ sve_fsub_zpzz_fns[a->esz], a)
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+
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+static gen_helper_gvec_4_ptr * const sve_fmul_zpzz_fns[4] = {
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+ gen_helper_sve_fmul_b16,
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+ gen_helper_sve_fmul_h,
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+ gen_helper_sve_fmul_s,
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+ gen_helper_sve_fmul_d
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+};
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+TRANS_FEAT(FMUL_zpzz, aa64_sme_or_sve, gen_gvec_fpst_arg_zpzz,
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+ sve_fmul_zpzz_fns[a->esz], a)
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+
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DO_ZPZZ_AH_FP_B16(FMIN_zpzz, aa64_sme_or_sve, sve_fmin, sve_ah_fmin)
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DO_ZPZZ_AH_FP_B16(FMAX_zpzz, aa64_sme_or_sve, sve_fmax, sve_ah_fmax)
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-DO_ZPZZ_FP_B16(FMINNM_zpzz, aa64_sme_or_sve, sve_fminnum)
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-DO_ZPZZ_FP_B16(FMAXNM_zpzz, aa64_sme_or_sve, sve_fmaxnum)
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+
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+static gen_helper_gvec_4_ptr * const sve_fmaxnum_fns[4] = {
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+ gen_helper_sve_fmaxnum_b16,
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+ gen_helper_sve_fmaxnum_h,
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+ gen_helper_sve_fmaxnum_s,
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+ gen_helper_sve_fmaxnum_d
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+};
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+TRANS_FEAT(FMAXNM_zpzz, aa64_sme_or_sve, gen_gvec_fpst_arg_zpzz,
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+ sve_fmaxnum_fns[a->esz], a)
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+
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+static gen_helper_gvec_4_ptr * const sve_fminnum_fns[4] = {
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+ gen_helper_sve_fminnum_b16,
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+ gen_helper_sve_fminnum_h,
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+ gen_helper_sve_fminnum_s,
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+ gen_helper_sve_fminnum_d
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+};
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+TRANS_FEAT(FMINNM_zpzz, aa64_sme_or_sve, gen_gvec_fpst_arg_zpzz,
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+ sve_fminnum_fns[a->esz], a)
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+
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DO_ZPZZ_AH_FP(FABD, aa64_sme_or_sve, sve_fabd, sve_ah_fabd)
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static gen_helper_gvec_4_ptr * const sve_fscalbn_zpzz_fns[4] = {