target/hppa: Delay MMU update until TLB protection bits were set
On a 32-bit HPPA CPU, the TLB update for a data translation happens with two consecutive instructions: IDTLBA and IDTLBP. The former sets the target page address, while the second sets the protection bits. There is no need to update the MMU after setting the address bits only, so delay the final update of the MMU until after the execution of the second instruction when the protection bits are known too. Signed-off-by: Helge Deller <deller@gmx.de>
Helge Deller committed
Jul 3, 2026 at 15:00 UTC
b1475464f7b6387eec1b297ee60dc9912ed661a2
1 file changed
+2
-2
target/hppa/translate.c
+2
-2
@@ -2570,7 +2570,7 @@ static bool trans_ixtlbx(DisasContext *ctx, arg_ixtlbx *a)
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}
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/* Exit TB for TLB change if mmu is enabled. */
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- if (ctx->tb_flags & PSW_C) {
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+ if (ctx->tb_flags & PSW_C && !a->addr) {
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ctx->base.is_jmp = DISAS_IAQ_N_STALE;
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}
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return nullify_end(ctx);
@@ -2687,7 +2687,7 @@ static bool trans_ixtlbxf(DisasContext *ctx, arg_ixtlbxf *a)
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}
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/* Exit TB for TLB change if mmu is enabled. */
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- if (ctx->tb_flags & PSW_C) {
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+ if (ctx->tb_flags & PSW_C && !a->addr) {
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ctx->base.is_jmp = DISAS_IAQ_N_STALE;
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}
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return nullify_end(ctx);