tcg: Export tcg_gen_ussub_i{32,64,tl}
Move from tcg-op-gvec.c to tcg-op.c. Use a temporary, to cover the possibility of operand overlap. (Cc for stable as this is a prerequisite for the bug fix in the next commit.) Cc: qemu-stable@nongnu.org Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Message-id: 20260811191540.79882-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson committed
Aug 11, 2026 at 12:15 UTC
b4f6f672a3e100706ddc249c26c2c149cdac1636
4 files changed
+24
-14
include/tcg/tcg-op-common.h
+2
@@ -163,6 +163,7 @@ void tcg_gen_smin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
163
void tcg_gen_smax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
164
void tcg_gen_umin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
165
void tcg_gen_umax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
166
+void tcg_gen_ussub_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
167
void tcg_gen_abs_i32(TCGv_i32, TCGv_i32);
168
void tcg_gen_revbit8_i32(TCGv_i32 ret, TCGv_i32 arg);
169
void tcg_gen_revbit32_i32(TCGv_i32 ret, TCGv_i32 arg);
@@ -276,6 +277,7 @@ void tcg_gen_smin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
277
void tcg_gen_smax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
278
void tcg_gen_umin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
279
void tcg_gen_umax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
280
+void tcg_gen_ussub_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
281
void tcg_gen_abs_i64(TCGv_i64, TCGv_i64);
282
void tcg_gen_revbit8_i64(TCGv_i64 ret, TCGv_i64 arg);
283
void tcg_gen_revbit32_i64(TCGv_i64 ret, TCGv_i64 arg, int flags);
include/tcg/tcg-op.h
+2
@@ -153,6 +153,7 @@ typedef TCGv_i64 TCGv;
153
#define tcg_gen_umin_tl tcg_gen_umin_i64
154
#define tcg_gen_smax_tl tcg_gen_smax_i64
155
#define tcg_gen_umax_tl tcg_gen_umax_i64
156
+#define tcg_gen_ussub_tl tcg_gen_ussub_i64
157
#define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i64
158
#define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i64
159
#define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i64
@@ -275,6 +276,7 @@ typedef TCGv_i64 TCGv;
276
#define tcg_gen_umin_tl tcg_gen_umin_i32
277
#define tcg_gen_smax_tl tcg_gen_smax_i32
278
#define tcg_gen_umax_tl tcg_gen_umax_i32
279
+#define tcg_gen_ussub_tl tcg_gen_ussub_i32
280
#define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i32
281
#define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i32
282
#define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i32
tcg/tcg-op-gvec.c
-14
@@ -2399,20 +2399,6 @@ void tcg_gen_gvec_usadd(unsigned vece, uint32_t dofs, uint32_t aofs,
2399
tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g[vece]);
2400
}
2401
2402
-static void tcg_gen_ussub_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b)
2403
-{
2404
- TCGv_i32 min = tcg_constant_i32(0);
2405
- tcg_gen_sub_i32(d, a, b);
2406
- tcg_gen_movcond_i32(TCG_COND_LTU, d, a, b, min, d);
2407
-}
2408
-
2409
-static void tcg_gen_ussub_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
2410
-{
2411
- TCGv_i64 min = tcg_constant_i64(0);
2412
- tcg_gen_sub_i64(d, a, b);
2413
- tcg_gen_movcond_i64(TCG_COND_LTU, d, a, b, min, d);
2414
-}
2415
-
2402
void tcg_gen_gvec_ussub(unsigned vece, uint32_t dofs, uint32_t aofs,
2403
uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
2404
{
tcg/tcg-op.c
+20
@@ -1328,6 +1328,16 @@ void tcg_gen_umax_i32(TCGv_i32 ret, TCGv_i32 a, TCGv_i32 b)
1328
}
1329
}
1330
1331
+void tcg_gen_ussub_i32(TCGv_i32 ret, TCGv_i32 a, TCGv_i32 b)
1332
+{
1333
+ TCGv_i32 t = tcg_temp_ebb_new_i32();
1334
+ TCGv_i32 z = tcg_constant_i32(0);
1335
+
1336
+ tcg_gen_sub_i32(t, a, b);
1337
+ tcg_gen_movcond_i32(TCG_COND_LTU, ret, a, b, z, t);
1338
+ tcg_temp_free_i32(t);
1339
+}
1340
+
1341
void tcg_gen_abs_i32(TCGv_i32 ret, TCGv_i32 a)
1342
{
1343
TCGv_i32 t = tcg_temp_ebb_new_i32();
@@ -2523,6 +2533,16 @@ void tcg_gen_umax_i64(TCGv_i64 ret, TCGv_i64 a, TCGv_i64 b)
2533
}
2534
}
2535
2536
+void tcg_gen_ussub_i64(TCGv_i64 ret, TCGv_i64 a, TCGv_i64 b)
2537
+{
2538
+ TCGv_i64 t = tcg_temp_ebb_new_i64();
2539
+ TCGv_i64 z = tcg_constant_i64(0);
2540
+
2541
+ tcg_gen_sub_i64(t, a, b);
2542
+ tcg_gen_movcond_i64(TCG_COND_LTU, ret, a, b, z, t);
2543
+ tcg_temp_free_i64(t);
2544
+}
2545
+
2546
void tcg_gen_abs_i64(TCGv_i64 ret, TCGv_i64 a)
2547
{
2548
TCGv_i64 t = tcg_temp_ebb_new_i64();