@samitouri / QOSamiQemu / commits / b56af8352b

hw/arm/aspeed: Add AST1040 EVB machine model

AST1040 is the next-generation device following AST1030 and is primarily designed as a bridge/BIC controller platform. Introduce a dedicated AST1040 EVB machine implementation for firmware development and validation. Although the existing ast10x0 EVB machine code already provides a reusable minibmc initialization flow, AST1040 requires different platform settings, including: - Different SYSCLK frequency - Different internal flash size To avoid overloading the existing AST1030-specific helper, introduce a separate aspeed_bic_machine_init() implementation in a dedicated source file. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20260525053036.3305181-8-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>

Jamin Lin committed May 25, 2026 at 05:30 UTC b56af8352b5e4916222b39d6f95d23638a01f481
2 files changed +75 -1
hw/arm/aspeed_ast1040_evb.c new
+73
@@ -0,0 +1,73 @@
1 +/*
2 + * ASPEED AST1040 EVB
3 + *
4 + * Copyright (C) 2026 ASPEED Technology Inc.
5 + *
6 + * SPDX-License-Identifier: GPL-2.0-or-later
7 + */
8 +
9 +#include "qemu/osdep.h"
10 +#include "qapi/error.h"
11 +#include "hw/arm/boot.h"
12 +#include "hw/arm/machines-qom.h"
13 +#include "hw/arm/aspeed.h"
14 +#include "hw/arm/aspeed_soc.h"
15 +#include "hw/core/qdev-clock.h"
16 +#include "system/system.h"
17 +
18 +#define AST1040_INTERNAL_FLASH_SIZE (4 * MiB)
19 +/* Main SYSCLK frequency in Hz (400MHz) */
20 +#define SYSCLK_FRQ 400000000ULL
21 +
22 +static void aspeed_bic_machine_init(MachineState *machine)
23 +{
24 + AspeedMachineState *bmc = ASPEED_MACHINE(machine);
25 + AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine);
26 + Clock *sysclk;
27 +
28 + sysclk = clock_new(OBJECT(machine), "SYSCLK");
29 + clock_set_hz(sysclk, SYSCLK_FRQ);
30 +
31 + bmc->soc = ASPEED_SOC(object_new(amc->soc_name));
32 + object_property_add_child(OBJECT(machine), "soc", OBJECT(bmc->soc));
33 + object_unref(OBJECT(bmc->soc));
34 + qdev_connect_clock_in(DEVICE(bmc->soc), "sysclk", sysclk);
35 +
36 + object_property_set_link(OBJECT(bmc->soc), "memory",
37 + OBJECT(get_system_memory()), &error_abort);
38 + aspeed_connect_serial_hds_to_uarts(bmc);
39 + qdev_realize(DEVICE(bmc->soc), NULL, &error_abort);
40 +
41 + armv7m_load_kernel(ARM_CPU(first_cpu),
42 + machine->kernel_filename,
43 + 0,
44 + AST1040_INTERNAL_FLASH_SIZE);
45 +}
46 +
47 +static void aspeed_machine_ast1040_evb_class_init(ObjectClass *oc,
48 + const void *data)
49 +{
50 + MachineClass *mc = MACHINE_CLASS(oc);
51 + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
52 +
53 + mc->desc = "Aspeed AST1040 BIC EVB (Cortex-M4F)";
54 + amc->soc_name = "ast1040-a0";
55 + amc->hw_strap1 = 0;
56 + amc->hw_strap2 = 0;
57 + mc->init = aspeed_bic_machine_init;
58 + mc->default_ram_size = 0;
59 + amc->macs_mask = 0;
60 + amc->uart_default = ASPEED_DEV_UART12;
61 + aspeed_machine_class_init_cpus_defaults(mc);
62 +}
63 +
64 +static const TypeInfo aspeed_ast1040_evb_types[] = {
65 + {
66 + .name = MACHINE_TYPE_NAME("ast1040-evb"),
67 + .parent = TYPE_ASPEED_MACHINE,
68 + .class_init = aspeed_machine_ast1040_evb_class_init,
69 + .interfaces = arm_machine_interfaces,
70 + }
71 +};
72 +
73 +DEFINE_TYPES(aspeed_ast1040_evb_types)
hw/arm/meson.build
+2 -1
@@ -64,7 +64,8 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
64 'aspeed_ast2600_rainier.c',
65 'aspeed_ast10x0.c',
66 'aspeed_ast10x0_evb.c',
67 - 'aspeed_ast1040.c'))
67 + 'aspeed_ast1040.c',
68 + 'aspeed_ast1040_evb.c'))
69 arm_common_ss.add(when: ['CONFIG_ASPEED_SOC', 'TARGET_AARCH64'], if_true: files(
70 'aspeed_ast1700.c',
71 'aspeed_ast27x0.c',