@samitouri / QOSamiQemu / commits / b6e61d1cc3

hw/dma/pl080: Update interrupts after pl080_run()

In the codepath in pl080_write() where we run the DMA engine after a change in the channel configuration register, we were missing a pl080_update() call, which meant that we weren't raising any interrupts generated by that DMA transfer. A repro case for this is to program the PL080 and then check the interrupt status by looking at the PL190 status register, since the PL080 interrupt output is connected to input 17 of the PL190. We look at the register value via the QEMU monitor: Reproducer ./qemu-system-arm -M versatilepb -m 128M -nographic -S \ -device loader,addr=0x00000000,data=0x11223344,data-len=4 \ -device loader,addr=0x00001000,data=0x00000000,data-len=4 \ -device loader,addr=0x10130030,data=0x00000001,data-len=4 \ -device loader,addr=0x10130100,data=0x00000000,data-len=4 \ -device loader,addr=0x10130104,data=0x00001000,data-len=4 \ -device loader,addr=0x10130108,data=0x00000000,data-len=4 \ -device loader,addr=0x1013010C,data=0x9e4bf001,data-len=4 \ -device loader,addr=0x10130110,data=0x0000c001,data-len=4 Qemu monitor (qemu) xp /1wx 0x10140008 10140008: 0x00000000 The correct result after this fix: (qemu) xp /1wx 0x10140008 10140008: 0x00020000 Cc: qemu-stable@nongnu.org Signed-off-by: Tao Ding <dingtao0430@163.com> Message-id: 7584486ba62bc6d767c0d132dc843067f8c5efff.1773301927.git.dingtao0430@163.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: Adjusted commit message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Tao Ding committed Mar 12, 2026 at 16:02 UTC b6e61d1cc3bfc9091ab83e25d9781a67ef9c86c1
1 file changed +1
hw/dma/pl080.c
+1
@@ -227,6 +227,7 @@ again:
227 if (--s->running)
228 s->running = 1;
229 }
230 + pl080_update(s);
231 }
232
233 static uint64_t pl080_read(void *opaque, hwaddr offset,