hw/hexagon: Add global register tracing
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
Brian Cain committed
Jun 22, 2026 at 15:28 UTC
bbea2f1a6d22ad57defddc530d7c92dcb7513a8b
4 files changed
+79
hw/hexagon/hexagon_globalreg.c
+73
@@ -16,11 +16,82 @@
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#include "target/hexagon/cpu.h"
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#include "target/hexagon/hex_regs.h"
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#include "qemu/log.h"
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+#include "trace.h"
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#include "qapi/error.h"
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#define IMMUTABLE (~0)
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#define INVALID_REG_VAL 0xdeadbeef
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+static const char *hex_sreg_names[] = {
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+ [HEX_SREG_SGP0] = "sgp0",
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+ [HEX_SREG_SGP1] = "sgp1",
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+ [HEX_SREG_STID] = "stid",
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+ [HEX_SREG_ELR] = "elr",
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+ [HEX_SREG_BADVA0] = "badva0",
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+ [HEX_SREG_BADVA1] = "badva1",
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+ [HEX_SREG_SSR] = "ssr",
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+ [HEX_SREG_CCR] = "ccr",
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+ [HEX_SREG_HTID] = "htid",
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+ [HEX_SREG_BADVA] = "badva",
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+ [HEX_SREG_IMASK] = "imask",
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+ [HEX_SREG_GEVB] = "gevb",
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+ [HEX_SREG_EVB] = "evb",
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+ [HEX_SREG_MODECTL] = "modectl",
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+ [HEX_SREG_SYSCFG] = "syscfg",
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+ [HEX_SREG_IPENDAD] = "ipendad",
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+ [HEX_SREG_VID] = "vid",
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+ [HEX_SREG_VID1] = "vid1",
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+ [HEX_SREG_BESTWAIT] = "bestwait",
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+ [HEX_SREG_IEL] = "iel",
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+ [HEX_SREG_SCHEDCFG] = "schedcfg",
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+ [HEX_SREG_IAHL] = "iahl",
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+ [HEX_SREG_CFGBASE] = "cfgbase",
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+ [HEX_SREG_DIAG] = "diag",
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+ [HEX_SREG_REV] = "rev",
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+ [HEX_SREG_PCYCLELO] = "pcyclelo",
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+ [HEX_SREG_PCYCLEHI] = "pcyclehi",
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+ [HEX_SREG_ISDBST] = "isdbst",
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+ [HEX_SREG_ISDBCFG0] = "isdbcfg0",
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+ [HEX_SREG_ISDBCFG1] = "isdbcfg1",
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+ [HEX_SREG_LIVELOCK] = "livelock",
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+ [HEX_SREG_BRKPTPC0] = "brkptpc0",
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+ [HEX_SREG_BRKPTCFG0] = "brkptcfg0",
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+ [HEX_SREG_BRKPTPC1] = "brkptpc1",
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+ [HEX_SREG_BRKPTCFG1] = "brkptcfg1",
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+ [HEX_SREG_ISDBMBXIN] = "isdbmbxin",
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+ [HEX_SREG_ISDBMBXOUT] = "isdbmbxout",
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+ [HEX_SREG_ISDBEN] = "isdben",
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+ [HEX_SREG_ISDBGPR] = "isdbgpr",
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+ [HEX_SREG_PMUCNT4] = "pmucnt4",
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+ [HEX_SREG_PMUCNT5] = "pmucnt5",
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+ [HEX_SREG_PMUCNT6] = "pmucnt6",
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+ [HEX_SREG_PMUCNT7] = "pmucnt7",
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+ [HEX_SREG_PMUCNT0] = "pmucnt0",
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+ [HEX_SREG_PMUCNT1] = "pmucnt1",
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+ [HEX_SREG_PMUCNT2] = "pmucnt2",
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+ [HEX_SREG_PMUCNT3] = "pmucnt3",
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+ [HEX_SREG_PMUEVTCFG] = "pmuevtcfg",
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+ [HEX_SREG_PMUSTID0] = "pmustid0",
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+ [HEX_SREG_PMUEVTCFG1] = "pmuevtcfg1",
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+ [HEX_SREG_PMUSTID1] = "pmustid1",
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+ [HEX_SREG_TIMERLO] = "timerlo",
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+ [HEX_SREG_TIMERHI] = "timerhi",
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+ [HEX_SREG_PMUCFG] = "pmucfg",
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+ [HEX_SREG_S59] = "s59",
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+ [HEX_SREG_S60] = "s60",
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+ [HEX_SREG_S61] = "s61",
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+ [HEX_SREG_S62] = "s62",
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+ [HEX_SREG_S63] = "s63",
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+};
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+
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+static const char *get_sreg_name(uint32_t reg)
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+{
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+ if (reg < ARRAY_SIZE(hex_sreg_names) && hex_sreg_names[reg]) {
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+ return hex_sreg_names[reg];
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+ }
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+ return "UNKNOWN";
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+}
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+
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/* Global system register mutability masks */
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static const uint32_t global_sreg_immut_masks[NUM_SREGS] = {
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[HEX_SREG_EVB] = 0x000000ff,
@@ -77,6 +148,7 @@ uint32_t hexagon_globalreg_read(HexagonGlobalRegState *s, uint32_t reg,
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value = s->regs[reg];
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+ trace_hexagon_globalreg_read(htid, get_sreg_name(reg), value);
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return value;
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}
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@@ -89,6 +161,7 @@ void hexagon_globalreg_write(HexagonGlobalRegState *s, uint32_t reg,
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g_assert(reg < NUM_SREGS);
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g_assert(reg >= HEX_SREG_GLB_START);
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s->regs[reg] = value;
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+ trace_hexagon_globalreg_write(htid, get_sreg_name(reg), value);
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}
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uint32_t hexagon_globalreg_masked_value(HexagonGlobalRegState *s, uint32_t reg,
hw/hexagon/trace-events
new
+3
@@ -0,0 +1,3 @@
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+# Hexagon global register access
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+hexagon_globalreg_read(uint32_t htid, const char *reg_name, uint32_t value) "htid=%u reg=%s value=0x%x"
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+hexagon_globalreg_write(uint32_t htid, const char *reg_name, uint32_t value) "htid=%u reg=%s value=0x%x"
hw/hexagon/trace.h
new
+2
@@ -0,0 +1,2 @@
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+/* SPDX-License-Identifier: GPL-2.0-or-later */
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+#include "trace/trace-hw_hexagon.h"
meson.build
+1
@@ -3601,6 +3601,7 @@ if have_system
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'hw/display',
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'hw/dma',
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'hw/fsi',
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+ 'hw/hexagon',
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'hw/hyperv',
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'hw/i2c',
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'hw/i3c',