target/arm: Define 'max' CPU type in cpu-max.c
Rather than having the 32-bit 'max' CPU type defined in cpu32.c and the 64-bit counter part in cpu64.c, unify the code in a single place in cpu-max.c. Define stubs for aarch64_host_initfn() and aarch64_max_tcg_initfn() in the 32-bit binary. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20260526203722.79463-16-philmd@linaro.org>
Philippe Mathieu-Daudé committed
May 15, 2026 at 09:27 UTC
bc02288cf1568749d983deceb23d581b3c58c95c
5 files changed
+77
-49
target/arm/cpu-max.c
+65
@@ -8,7 +8,10 @@
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#include "qemu/osdep.h"
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#include "qemu/units.h"
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+#include "system/hw_accel.h"
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#include "system/kvm.h"
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+#include "system/qtest.h"
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+#include "system/tcg.h"
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#include "target/arm/internals.h"
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#include "target/arm/cpregs.h"
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@@ -178,3 +181,65 @@ void aa32_max_features(ARMCPU *cpu)
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FIELD_DP32_IDREG(isar, ID_DFR1, HPMN0, 1); /* FEAT_HPMN0 */
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}
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+
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+/*
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+ * -cpu max: a CPU with as many features enabled as our emulation supports.
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+ * The version of '-cpu max' for qemu-system-aarch64 is defined in cpu64.c;
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+ * this only needs to handle 32 bits, and need not care about KVM.
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+ */
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+static void cpu_max_initfn(Object *obj)
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+{
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+ ARMCPU *cpu = ARM_CPU(obj);
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+
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+#ifdef TARGET_AARCH64
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+ const bool aarch64_enabled = true;
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+#else
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+ const bool aarch64_enabled = false;
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+#endif /* !TARGET_AARCH64 */
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+
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+ if (hwaccel_enabled()) {
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+ assert(aarch64_enabled);
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+ /*
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+ * When hardware acceleration enabled, '-cpu max' is
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+ * identical to '-cpu host'
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+ */
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+ aarch64_host_initfn(obj);
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+ return;
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+ }
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+
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+ if (tcg_enabled() || qtest_enabled()) {
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+ aarch64_aa32_a57_init(obj, !aarch64_enabled);
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+ }
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+
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+ if (!aarch64_enabled) {
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+ aa32_max_features(cpu);
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+#ifdef CONFIG_USER_ONLY
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+ /*
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+ * Break with true ARMv8 and add back old-style VFP short-vector
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+ * support. Only do this for user-mode, where -cpu max is the default,
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+ * so that older v6 and v7 programs are more likely to work without
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+ * adjustment.
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+ */
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+ cpu->isar.mvfr0 = FIELD_DP32(cpu->isar.mvfr0, MVFR0, FPSHVEC, 1);
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+#endif
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+ } else if (tcg_enabled()) {
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+ assert(aarch64_enabled);
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+ /*
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+ * '-cpu max' for TCG: we currently do this as
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+ * "A57 with extra things"
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+ */
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+ aarch64_max_tcg_initfn(obj);
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+ }
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+}
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+
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+static const ARMCPUInfo arm_max_cpu = {
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+ .name = "max",
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+ .initfn = cpu_max_initfn,
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+};
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+
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+static void arm_max_cpu_register_types(void)
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+{
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+ arm_cpu_register(&arm_max_cpu);
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+}
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+
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+type_init(arm_max_cpu_register_types)
target/arm/cpu64.c
+1
-20
@@ -791,7 +791,7 @@ static void kvm_arm_set_cpreg_mig_tolerances(ARMCPU *cpu)
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}
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#endif
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-static void aarch64_host_initfn(Object *obj)
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+void aarch64_host_initfn(Object *obj)
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{
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ARMCPU *cpu = ARM_CPU(obj);
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@@ -818,28 +818,9 @@ static void aarch64_host_initfn(Object *obj)
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}
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}
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-static void aarch64_max_initfn(Object *obj)
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-{
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- if (hwaccel_enabled()) {
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- /* When hardware acceleration enabled, '-cpu max' is identical to '-cpu host' */
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- aarch64_host_initfn(obj);
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- return;
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- }
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-
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- if (tcg_enabled() || qtest_enabled()) {
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- aarch64_aa32_a57_init(obj, false);
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- }
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-
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- /* '-cpu max' for TCG: we currently do this as "A57 with extra things" */
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- if (tcg_enabled()) {
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- aarch64_max_tcg_initfn(obj);
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- }
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-}
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-
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static const ARMCPUInfo aarch64_cpus[] = {
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{ .name = "cortex-a57", .initfn = aarch64_a57_initfn },
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{ .name = "cortex-a53", .initfn = aarch64_a53_initfn },
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- { .name = "max", .initfn = aarch64_max_initfn },
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#if defined(CONFIG_KVM) || defined(CONFIG_HVF) || defined(CONFIG_WHPX)
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{ .name = "host", .initfn = aarch64_host_initfn },
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#endif
target/arm/internals.h
+1
@@ -1774,6 +1774,7 @@ void aarch64_add_pauth_properties(Object *obj);
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void aarch64_add_sve_properties(Object *obj);
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void aarch64_add_sme_properties(Object *obj);
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void aarch64_aa32_a57_init(Object *obj, bool aa32_only);
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+void aarch64_host_initfn(Object *obj);
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/* Return true if the gdbstub is presenting an AArch64 CPU */
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static inline bool arm_gdbstub_is_aarch64(ARMCPU *cpu)
target/arm/tcg/cpu32.c
-29
@@ -711,32 +711,6 @@ static void sa1110_initfn(Object *obj)
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cpu->reset_sctlr = 0x00000070;
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}
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-#ifndef TARGET_AARCH64
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-/*
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- * -cpu max: a CPU with as many features enabled as our emulation supports.
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- * The version of '-cpu max' for qemu-system-aarch64 is defined in cpu64.c;
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- * this only needs to handle 32 bits, and need not care about KVM.
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- */
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-static void arm_max_initfn(Object *obj)
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-{
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- ARMCPU *cpu = ARM_CPU(obj);
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-
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- /* Cortex-A57 advertising none of the aarch64 features */
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- aarch64_aa32_a57_init(obj, true);
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-
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- aa32_max_features(cpu);
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-
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-#ifdef CONFIG_USER_ONLY
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- /*
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- * Break with true ARMv8 and add back old-style VFP short-vector support.
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- * Only do this for user-mode, where -cpu max is the default, so that
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- * older v6 and v7 programs are more likely to work without adjustment.
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- */
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- cpu->isar.mvfr0 = FIELD_DP32(cpu->isar.mvfr0, MVFR0, FPSHVEC, 1);
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-#endif
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-}
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-#endif /* !TARGET_AARCH64 */
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-
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static const ARMCPUInfo arm_tcg_cpus[] = {
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{ .name = "arm926", .initfn = arm926_initfn },
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{ .name = "arm946", .initfn = arm946_initfn },
@@ -760,9 +734,6 @@ static const ARMCPUInfo arm_tcg_cpus[] = {
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{ .name = "ti925t", .initfn = ti925t_initfn },
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{ .name = "sa1100", .initfn = sa1100_initfn },
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{ .name = "sa1110", .initfn = sa1110_initfn },
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-#ifndef TARGET_AARCH64
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- { .name = "max", .initfn = arm_max_initfn },
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-#endif
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};
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static void arm_tcg_cpu_register_types(void)
target/arm/tcg/stubs32.c
+10
@@ -22,3 +22,13 @@ void aarch64_translate_code(CPUState *cs, TranslationBlock *tb,
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{
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g_assert_not_reached();
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}
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+
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+void aarch64_host_initfn(Object *obj)
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+{
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+ g_assert_not_reached();
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+}
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+
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+void aarch64_max_tcg_initfn(Object *obj)
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+{
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+ g_assert_not_reached();
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+}