hw/arm/tegra241-cmdqv: Add Tegra241 CMDQV ops backend stub
Introduce a Tegra241 CMDQV backend that plugs into the SMMUv3 accelerated CMDQV ops interface. This patch wires up the Tegra241 CMDQV backend and provides a stub implementation for CMDQV probe, initialization, vIOMMU allocation and reset handling. Functional CMDQV support is added in follow-up patches. Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Nicolin Chen <nicolinc@nvidia.com> Tested-by: Nicolin Chen <nicolinc@nvidia.com> Signed-off-by: Shameer Kolothum <skolothumtho@nvidia.com> Tested-by: Eric Auger <eric.auger@redhat.com> Message-id: 20260609112552.378999-8-skolothumtho@nvidia.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Shameer Kolothum committed
Jun 9, 2026 at 12:25 UTC
bc2fd5ce6ca0f06559c5f9c4f682642ec9d20b25
5 files changed
+94
hw/arm/Kconfig
+5
@@ -643,6 +643,10 @@ config FSL_IMX8MM_EVK
643
depends on TCG
644
select FSL_IMX8MM
645
646
+config TEGRA241_CMDQV
647
+ bool
648
+ depends on ARM_SMMUV3_ACCEL
649
+
650
config ARM_SMMUV3_ACCEL
651
bool
652
depends on ARM_SMMUV3
@@ -650,6 +654,7 @@ config ARM_SMMUV3_ACCEL
654
config ARM_SMMUV3
655
bool
656
select ARM_SMMUV3_ACCEL if IOMMUFD
657
+ imply TEGRA241_CMDQV
658
659
config FSL_IMX6UL
660
bool
hw/arm/meson.build
+2
@@ -89,6 +89,8 @@ arm_common_ss.add(when: 'CONFIG_FSL_IMX8MM_EVK', if_true: files('imx8mm-evk.c'))
89
arm_common_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmuv3.c'))
90
arm_common_ss.add(when: 'CONFIG_ARM_SMMUV3_ACCEL', if_true: files('smmuv3-accel.c'))
91
stub_ss.add(files('smmuv3-accel-stubs.c'))
92
+arm_common_ss.add(when: 'CONFIG_TEGRA241_CMDQV', if_true: files('tegra241-cmdqv.c'))
93
+stub_ss.add(files('tegra241-cmdqv-stubs.c'))
94
arm_common_ss.add(when: 'CONFIG_FSL_IMX6UL', if_true: files('fsl-imx6ul.c', 'mcimx6ul-evk.c'))
95
arm_common_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_soc.c'))
96
arm_common_ss.add(when: 'CONFIG_XEN', if_true: files(
hw/arm/tegra241-cmdqv-stubs.c
new
+16
@@ -0,0 +1,16 @@
1
+/*
2
+ * Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved
3
+ *
4
+ * Stubs for Tegra241 CMDQ-Virtualization extension for SMMUv3
5
+ *
6
+ * SPDX-License-Identifier: GPL-2.0-or-later
7
+ */
8
+
9
+#include "qemu/osdep.h"
10
+#include "smmuv3-accel.h"
11
+#include "hw/arm/tegra241-cmdqv.h"
12
+
13
+const SMMUv3AccelCmdqvOps *tegra241_cmdqv_get_ops(void)
14
+{
15
+ return NULL;
16
+}
hw/arm/tegra241-cmdqv.c
new
+56
@@ -0,0 +1,56 @@
1
+/*
2
+ * Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved
3
+ * NVIDIA Tegra241 CMDQ-Virtualization extension for SMMUv3
4
+ *
5
+ * Written by Nicolin Chen, Shameer Kolothum
6
+ *
7
+ * SPDX-License-Identifier: GPL-2.0-or-later
8
+ */
9
+
10
+#include "qemu/osdep.h"
11
+
12
+#include "hw/arm/smmuv3.h"
13
+#include "smmuv3-accel.h"
14
+#include "tegra241-cmdqv.h"
15
+
16
+static void tegra241_cmdqv_free_viommu(SMMUv3State *s)
17
+{
18
+}
19
+
20
+static bool
21
+tegra241_cmdqv_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev,
22
+ uint32_t *out_viommu_id, Error **errp)
23
+{
24
+ error_setg(errp, "NVIDIA Tegra241 CMDQV is unsupported");
25
+ return false;
26
+}
27
+
28
+static void tegra241_cmdqv_reset(SMMUv3State *s)
29
+{
30
+}
31
+
32
+static bool tegra241_cmdqv_init(SMMUv3State *s, Error **errp)
33
+{
34
+ error_setg(errp, "NVIDIA Tegra241 CMDQV is unsupported");
35
+ return false;
36
+}
37
+
38
+static bool tegra241_cmdqv_probe(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev,
39
+ Error **errp)
40
+{
41
+ error_setg(errp, "NVIDIA Tegra241 CMDQV is unsupported");
42
+ return false;
43
+}
44
+
45
+static const SMMUv3AccelCmdqvOps tegra241_cmdqv_ops = {
46
+ .probe = tegra241_cmdqv_probe,
47
+ .init = tegra241_cmdqv_init,
48
+ .alloc_viommu = tegra241_cmdqv_alloc_viommu,
49
+ .free_viommu = tegra241_cmdqv_free_viommu,
50
+ .reset = tegra241_cmdqv_reset,
51
+};
52
+
53
+const SMMUv3AccelCmdqvOps *tegra241_cmdqv_get_ops(void)
54
+{
55
+ return &tegra241_cmdqv_ops;
56
+}
hw/arm/tegra241-cmdqv.h
new
+15
@@ -0,0 +1,15 @@
1
+/*
2
+ * Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved
3
+ * NVIDIA Tegra241 CMDQ-Virtualization extension for SMMUv3
4
+ *
5
+ * Written by Nicolin Chen, Shameer Kolothum
6
+ *
7
+ * SPDX-License-Identifier: GPL-2.0-or-later
8
+ */
9
+
10
+#ifndef HW_ARM_TEGRA241_CMDQV_H
11
+#define HW_ARM_TEGRA241_CMDQV_H
12
+
13
+const SMMUv3AccelCmdqvOps *tegra241_cmdqv_get_ops(void);
14
+
15
+#endif /* HW_ARM_TEGRA241_CMDQV_H */