@samitouri / QOSamiQemu / commits / c1d5ef32e7

tcg: Drop extract+shl expansions in tcg_gen_deposit_z_*

The extract+shl expansion is handled in tcg_gen_andi_* by preferring supported extract. The shl+extract expansion is simply removed for now; it was only present for slightly smaller code generation on x86. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20260303010833.1115741-2-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Richard Henderson committed Mar 2, 2026 at 05:21 UTC c1d5ef32e79ecc4d646d616bc23cdf7355c99c35
1 file changed -30
tcg/tcg-op.c
-30
@@ -937,21 +937,6 @@ void tcg_gen_deposit_z_i32(TCGv_i32 ret, TCGv_i32 arg,
937 TCGv_i32 zero = tcg_constant_i32(0);
938 tcg_gen_op5ii_i32(INDEX_op_deposit, ret, zero, arg, ofs, len);
939 } else {
940 - /*
941 - * To help two-operand hosts we prefer to zero-extend first,
942 - * which allows ARG to stay live.
943 - */
944 - if (TCG_TARGET_extract_valid(TCG_TYPE_I32, 0, len)) {
945 - tcg_gen_extract_i32(ret, arg, 0, len);
946 - tcg_gen_shli_i32(ret, ret, ofs);
947 - return;
948 - }
949 - /* Otherwise prefer zero-extension over AND for code size. */
950 - if (TCG_TARGET_extract_valid(TCG_TYPE_I32, 0, ofs + len)) {
951 - tcg_gen_shli_i32(ret, arg, ofs);
952 - tcg_gen_extract_i32(ret, ret, 0, ofs + len);
953 - return;
954 - }
940 tcg_gen_andi_i32(ret, arg, (1u << len) - 1);
941 tcg_gen_shli_i32(ret, ret, ofs);
942 }
@@ -2210,21 +2195,6 @@ void tcg_gen_deposit_z_i64(TCGv_i64 ret, TCGv_i64 arg,
2195 TCGv_i64 zero = tcg_constant_i64(0);
2196 tcg_gen_op5ii_i64(INDEX_op_deposit, ret, zero, arg, ofs, len);
2197 } else {
2213 - /*
2214 - * To help two-operand hosts we prefer to zero-extend first,
2215 - * which allows ARG to stay live.
2216 - */
2217 - if (TCG_TARGET_extract_valid(TCG_TYPE_I64, 0, len)) {
2218 - tcg_gen_extract_i64(ret, arg, 0, len);
2219 - tcg_gen_shli_i64(ret, ret, ofs);
2220 - return;
2221 - }
2222 - /* Otherwise prefer zero-extension over AND for code size. */
2223 - if (TCG_TARGET_extract_valid(TCG_TYPE_I64, 0, ofs + len)) {
2224 - tcg_gen_shli_i64(ret, arg, ofs);
2225 - tcg_gen_extract_i64(ret, ret, 0, ofs + len);
2226 - return;
2227 - }
2198 tcg_gen_andi_i64(ret, arg, (1ull << len) - 1);
2199 tcg_gen_shli_i64(ret, ret, ofs);
2200 }