target/i386: Update cc_op for SAHF
Removing the call to gen_compute_eflags meant we no longer updated cc_op after computing EFLAGS. Cc: qemu-stable@nongnu.org Fixes: da7649c6aeef ("target/i386/tcg: do not compute all flags for SAHF") Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3537 Tested-by: Christian Quante <christian@quante.one> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson committed
Jun 8, 2026 at 17:15 UTC
c25f69595ad052473463540f4d7944b9b73e94ec
1 file changed
+6
-3
target/i386/tcg/emit.c.inc
+6
-3
@@ -3780,10 +3780,13 @@ static void gen_SAHF(DisasContext *s, X86DecodedInsn *decode)
3780
return gen_illegal_opcode(s);
3781
}
3782
tcg_gen_shri_tl(s->T0, cpu_regs[R_EAX], 8);
3783
- gen_neg_setcc(s, JCC_O << 1, cpu_cc_src);
3784
- tcg_gen_andi_tl(cpu_cc_src, cpu_cc_src, CC_O);
3783
+ gen_neg_setcc(s, JCC_O << 1, s->T1);
3784
+ tcg_gen_andi_tl(s->T1, s->T1, CC_O);
3785
tcg_gen_andi_tl(s->T0, s->T0, CC_S | CC_Z | CC_A | CC_P | CC_C);
3786
- tcg_gen_or_tl(cpu_cc_src, cpu_cc_src, s->T0);
3786
+ tcg_gen_or_tl(s->T0, s->T0, s->T1);
3787
+
3788
+ decode->cc_src = s->T0;
3789
+ decode->cc_op = CC_OP_EFLAGS;
3790
}
3791
3792
static void gen_SALC(DisasContext *s, X86DecodedInsn *decode)