@samitouri / QOSamiQemu / commits / c2ca373740

tcg: Add tcg_gen_revbit{8,32,64}

Add generic expanders for reversing bits within a word. Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Richard Henderson committed Jul 30, 2026 at 10:55 UTC c2ca3737400ebf9432bf14fc59db69538868466d
3 files changed +88
include/tcg/tcg-op-common.h
+5
@@ -164,6 +164,8 @@ void tcg_gen_smax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
164 void tcg_gen_umin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
165 void tcg_gen_umax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
166 void tcg_gen_abs_i32(TCGv_i32, TCGv_i32);
167 +void tcg_gen_revbit8_i32(TCGv_i32 ret, TCGv_i32 arg);
168 +void tcg_gen_revbit32_i32(TCGv_i32 ret, TCGv_i32 arg);
169
170 /* Replicate a value of size @vece from @in to all the lanes in @out */
171 void tcg_gen_dup_i32(unsigned vece, TCGv_i32 out, TCGv_i32 in);
@@ -275,6 +277,9 @@ void tcg_gen_smax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
277 void tcg_gen_umin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
278 void tcg_gen_umax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
279 void tcg_gen_abs_i64(TCGv_i64, TCGv_i64);
280 +void tcg_gen_revbit8_i64(TCGv_i64 ret, TCGv_i64 arg);
281 +void tcg_gen_revbit32_i64(TCGv_i64 ret, TCGv_i64 arg, int flags);
282 +void tcg_gen_revbit64_i64(TCGv_i64 ret, TCGv_i64 arg);
283
284 /* Replicate a value of size @vece from @in to all the lanes in @out */
285 void tcg_gen_dup_i64(unsigned vece, TCGv_i64 out, TCGv_i64 in);
include/tcg/tcg-op.h
+7
@@ -115,6 +115,10 @@ typedef TCGv_i64 TCGv;
115 #define tcg_gen_bswap_tl tcg_gen_bswap64_i64
116 #define tcg_gen_hswap_tl tcg_gen_hswap_i64
117 #define tcg_gen_wswap_tl tcg_gen_wswap_i64
118 +#define tcg_gen_revbit8_tl tcg_gen_revbit8_i64
119 +#define tcg_gen_revbit32_tl tcg_gen_revbit32_i64
120 +#define tcg_gen_revbit64_tl tcg_gen_revbit64_i64
121 +#define tcg_gen_revbit_tl tcg_gen_revbit64_i64
122 #define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64
123 #define tcg_gen_extr_i64_tl tcg_gen_extr32_i64
124 #define tcg_gen_andc_tl tcg_gen_andc_i64
@@ -234,6 +238,9 @@ typedef TCGv_i64 TCGv;
238 #define tcg_gen_bswap32_tl(D, S, F) tcg_gen_bswap32_i32(D, S)
239 #define tcg_gen_bswap_tl tcg_gen_bswap32_i32
240 #define tcg_gen_hswap_tl tcg_gen_hswap_i32
241 +#define tcg_gen_revbit8_tl tcg_gen_revbit8_i32
242 +#define tcg_gen_revbit32_tl(D, S, F) tcg_gen_revbit32_i32(D, S)
243 +#define tcg_gen_revbit_tl tcg_gen_revbit32_i32
244 #define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64
245 #define tcg_gen_extr_i64_tl tcg_gen_extr_i64_i32
246 #define tcg_gen_andc_tl tcg_gen_andc_i32
tcg/tcg-op.c
+76
@@ -1160,6 +1160,45 @@ void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg)
1160 tcg_gen_extract_i32(ret, arg, 0, 16);
1161 }
1162
1163 +/*
1164 + * Internal helper for bit and byte reversal.
1165 + * Given a repeating matched block of 1's and 0's, swap the bits within
1166 + * those two blocks. E.g. mask=00ff00ff, shift the input bits left and
1167 + * right 8 bits.
1168 + */
1169 +static void gen_bitswap_i32(TCGv_i32 ret, TCGv_i32 arg, uint32_t mask)
1170 +{
1171 + TCGv_i32 t0 = tcg_temp_ebb_new_i32();
1172 + TCGv_i32 t1 = tcg_temp_ebb_new_i32();
1173 + int sh = cto32(mask);
1174 +
1175 + tcg_gen_andi_i32(t0, arg, mask);
1176 + tcg_gen_shri_i32(t1, arg, sh);
1177 + tcg_gen_shli_i32(t0, t0, sh);
1178 + tcg_gen_andi_i32(t1, t1, mask);
1179 + tcg_gen_or_i32(ret, t0, t1);
1180 +
1181 + tcg_temp_free_i32(t0);
1182 + tcg_temp_free_i32(t1);
1183 +}
1184 +
1185 +/* Similarly for 64-bit operands. */
1186 +static void gen_bitswap_i64(TCGv_i64 ret, TCGv_i64 arg, uint64_t mask)
1187 +{
1188 + TCGv_i64 t0 = tcg_temp_ebb_new_i64();
1189 + TCGv_i64 t1 = tcg_temp_ebb_new_i64();
1190 + int sh = cto64(mask);
1191 +
1192 + tcg_gen_andi_i64(t0, arg, mask);
1193 + tcg_gen_shri_i64(t1, arg, sh);
1194 + tcg_gen_shli_i64(t0, t0, sh);
1195 + tcg_gen_andi_i64(t1, t1, mask);
1196 + tcg_gen_or_i64(ret, t0, t1);
1197 +
1198 + tcg_temp_free_i64(t0);
1199 + tcg_temp_free_i64(t1);
1200 +}
1201 +
1202 /*
1203 * bswap16_i32: 16-bit byte swap on the low bits of a 32-bit value.
1204 *
@@ -1244,6 +1283,19 @@ void tcg_gen_hswap_i32(TCGv_i32 ret, TCGv_i32 arg)
1283 tcg_gen_rotli_i32(ret, arg, 16);
1284 }
1285
1286 +void tcg_gen_revbit8_i32(TCGv_i32 ret, TCGv_i32 arg)
1287 +{
1288 + gen_bitswap_i32(ret, arg, 0x55555555u);
1289 + gen_bitswap_i32(ret, ret, 0x33333333u);
1290 + gen_bitswap_i32(ret, ret, 0x0f0f0f0fu);
1291 +}
1292 +
1293 +void tcg_gen_revbit32_i32(TCGv_i32 ret, TCGv_i32 arg)
1294 +{
1295 + tcg_gen_revbit8_i32(ret, arg);
1296 + tcg_gen_bswap32_i32(ret, ret);
1297 +}
1298 +
1299 void tcg_gen_smin_i32(TCGv_i32 ret, TCGv_i32 a, TCGv_i32 b)
1300 {
1301 tcg_gen_movcond_i32(TCG_COND_LT, ret, a, b, a, b);
@@ -1869,6 +1921,30 @@ void tcg_gen_wswap_i64(TCGv_i64 ret, TCGv_i64 arg)
1921 tcg_gen_rotli_i64(ret, arg, 32);
1922 }
1923
1924 +void tcg_gen_revbit32_i64(TCGv_i64 ret, TCGv_i64 arg, int flags)
1925 +{
1926 + /* Only one extension flag may be present. */
1927 + tcg_debug_assert(!(flags & TCG_BSWAP_OS) || !(flags & TCG_BSWAP_OZ));
1928 +
1929 + gen_bitswap_i64(ret, arg, 0x55555555ull);
1930 + gen_bitswap_i64(ret, ret, 0x33333333ull);
1931 + gen_bitswap_i64(ret, ret, 0x0f0f0f0full);
1932 + tcg_gen_bswap32_i64(ret, ret, flags | TCG_BSWAP_IZ);
1933 +}
1934 +
1935 +void tcg_gen_revbit8_i64(TCGv_i64 ret, TCGv_i64 arg)
1936 +{
1937 + gen_bitswap_i64(ret, arg, 0x5555555555555555ull);
1938 + gen_bitswap_i64(ret, ret, 0x3333333333333333ull);
1939 + gen_bitswap_i64(ret, ret, 0x0f0f0f0f0f0f0f0full);
1940 +}
1941 +
1942 +void tcg_gen_revbit64_i64(TCGv_i64 ret, TCGv_i64 arg)
1943 +{
1944 + tcg_gen_revbit8_i64(ret, arg);
1945 + tcg_gen_bswap64_i64(ret, ret);
1946 +}
1947 +
1948 void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg)
1949 {
1950 if (tcg_op_supported(INDEX_op_not, TCG_TYPE_I64, 0)) {