@samitouri / QOSamiQemu / commits / c4580a3a6d

hw/i2c/bcm2835_i2c: Correct CLKT register offset

The Clock Stretch Timeout (CLKT) register for the BCM2835 I2C controller is actually located at offset 0x1c, not 0x20. Update the BCM2835_I2C_CLKT macro to match the hardware specification. Since QEMU's implementation ignores whatever value the guest writes to this register, and Linux only writes to CLKT and doesn't read it back, the main effect of this fix is to avoid an incorrect GUEST_ERROR log. Cc: qemu-stable@nongnu.org Fixes: 9cf3bc65afdb63 ("hw/i2c: Implement Broadcom Serial Controller (BSC)") Signed-off-by: botszhuang <botszhuang@gmail.com> Tested-by: Nick Huang <sef1548@gmail.com> Message-id: 20260724124220.24152-1-22925483+botszhuang@users.noreply.github.com [PMM: removed commit message paragraph about effects which I think is incorrect, substituted a different one] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

botszhuang committed Jul 24, 2026 at 20:42 UTC c4580a3a6d1cc542479602048d15556a18928a22

1 file changed +1 -1

include/hw/i2c/bcm2835_i2c.h

+1 -1

@@ -38,7 +38,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(BCM2835I2CState, BCM2835_I2C)

38 #define BCM2835_I2C_FIFO 0x10 /* FIFO */

39 #define BCM2835_I2C_DIV 0x14 /* Clock Divider */

40 #define BCM2835_I2C_DEL 0x18 /* Data Delay */

41 -#define BCM2835_I2C_CLKT 0x20 /* Clock Stretch Timeout */

41 +#define BCM2835_I2C_CLKT 0x1c /* Clock Stretch Timeout */

43 #define BCM2835_I2C_C_I2CEN BIT(15) /* I2C enable */

44 #define BCM2835_I2C_C_INTR BIT(10) /* Interrupt on RXR */