tcg/loongarch64: Fix cmp_vec with TCG_COND_NE
For NE we need to invert EQ, not swap operands. Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3589 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20260623140609.645445-1-richard.henderson@linaro.org>
Richard Henderson committed
Jun 23, 2026 at 07:06 UTC
c56ebd64b82aa4d4a4e2144abbf9568ef593b836
1 file changed
+28
-11
tcg/loongarch64/tcg-target.c.inc
+28
-11
@@ -2371,19 +2371,36 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
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default:
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g_assert_not_reached();
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}
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- break;
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- }
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-
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- insn = cmp_vec_insn[cond][lasx][vece];
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- if (insn == 0) {
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- TCGArg t;
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- t = a1, a1 = a2, a2 = t;
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- cond = tcg_swap_cond(cond);
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- insn = cmp_vec_insn[cond][lasx][vece];
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- tcg_debug_assert(insn != 0);
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+ } else {
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+ switch (cond) {
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+ case TCG_COND_EQ:
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+ case TCG_COND_LE:
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+ case TCG_COND_LEU:
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+ case TCG_COND_LT:
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+ case TCG_COND_LTU:
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+ insn = cmp_vec_insn[cond][lasx][vece];
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+ tcg_out32(s, encode_vdvjvk_insn(insn, a0, a1, a2));
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+ break;
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+ case TCG_COND_GE:
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+ case TCG_COND_GEU:
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+ case TCG_COND_GT:
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+ case TCG_COND_GTU:
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+ insn = cmp_vec_insn[tcg_swap_cond(cond)][lasx][vece];
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+ tcg_out32(s, encode_vdvjvk_insn(insn, a0, a2, a1));
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+ break;
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+ case TCG_COND_NE:
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+ /* ne -> not(eq) */
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+ insn = cmp_vec_insn[TCG_COND_EQ][lasx][vece];
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+ tcg_out32(s, encode_vdvjvk_insn(insn, a0, a1, a2));
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+ insn = lasx ? OPC_XVNOR_V : OPC_VNOR_V;
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+ tcg_out32(s, encode_vdvjvk_insn(insn, a0, a0, a0));
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+ break;
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+ default:
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+ g_assert_not_reached();
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+ }
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}
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}
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- goto vdvjvk;
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+ break;
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case INDEX_op_add_vec:
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tcg_out_addsub_vec(s, lasx, vece, a0, a1, a2, const_args[2], true);
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break;