target/ppc: Move byte-reverse instructions to decodetree
Moving the following instructions to decodetree specification: brd, brw, brh : X-form The changes were verified by validating that the tcg ops generated by those instructions remain the same, which were captured with the `-d in_asm,op` flag. This also includes improvements from review feedback: - Add TARGET_PPC64 guards with qemu_build_not_reached() for 32-bit builds Signed-off-by: Vishal Chourasia <vishalc@linux.ibm.com> Reviewed-by: Glenn Miles <milesg@linux.ibm.com> Signed-off-by: Chinmay Rath <rathc@linux.ibm.com> Reviewed-by: Amit Machhiwal <amachhiw@linux.ibm.com> Tested-by: Aniket Sahu <asahu1x@linux.ibm.com> Link: https://lore.kernel.org/qemu-devel/20260827133010.278889-29-rathc@linux.ibm.com Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Vishal Chourasia committed
Aug 27, 2026 at 18:59 UTC
c5b846fb85f9e80a842c0539629fe3611747df85
3 files changed
+53
-35
target/ppc/insn32.decode
+5
@@ -320,6 +320,11 @@ MFMSR 011111 ..... ----- ----- 0001010011 - @X_t
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MTMSR 011111 ..... ---- . ----- 0010010010 - @X_rs_l
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MTMSRD 011111 ..... ---- . ----- 0010110010 - @X_rs_l
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+### Fixed-Point Byte-Reverse Instructions
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+BRW 011111 ..... ..... ----- 0010011011 - @X_sa
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+BRD 011111 ..... ..... ----- 0010111011 - @X_sa
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+BRH 011111 ..... ..... ----- 0011011011 - @X_sa
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+
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### Fixed-Point Load Instructions
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LBZ 100010 ..... ..... ................ @D
target/ppc/translate.c
-35
@@ -4519,42 +4519,7 @@ static void gen_dform3D(DisasContext *ctx)
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return gen_invalid(ctx);
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}
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-#if defined(TARGET_PPC64)
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-/* brd */
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-static void gen_brd(DisasContext *ctx)
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-{
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- tcg_gen_bswap64_i64(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]);
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-}
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-
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-/* brw */
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-static void gen_brw(DisasContext *ctx)
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-{
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- tcg_gen_bswap64_i64(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]);
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- tcg_gen_rotli_i64(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], 32);
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-
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-}
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-
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-/* brh */
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-static void gen_brh(DisasContext *ctx)
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-{
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- TCGv_i64 mask = tcg_constant_i64(0x00ff00ff00ff00ffull);
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- TCGv_i64 t1 = tcg_temp_new_i64();
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- TCGv_i64 t2 = tcg_temp_new_i64();
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-
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- tcg_gen_shri_i64(t1, cpu_gpr[rS(ctx->opcode)], 8);
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- tcg_gen_and_i64(t2, t1, mask);
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- tcg_gen_and_i64(t1, cpu_gpr[rS(ctx->opcode)], mask);
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- tcg_gen_shli_i64(t1, t1, 8);
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- tcg_gen_or_i64(cpu_gpr[rA(ctx->opcode)], t1, t2);
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-}
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-#endif
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-
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static opcode_t opcodes[] = {
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-#if defined(TARGET_PPC64)
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-GEN_HANDLER_E(brd, 0x1F, 0x1B, 0x05, 0x0000F801, PPC_NONE, PPC2_ISA310),
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-GEN_HANDLER_E(brw, 0x1F, 0x1B, 0x04, 0x0000F801, PPC_NONE, PPC2_ISA310),
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-GEN_HANDLER_E(brh, 0x1F, 0x1B, 0x06, 0x0000F801, PPC_NONE, PPC2_ISA310),
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-#endif
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GEN_HANDLER(invalid, 0x00, 0x00, 0x00, 0xFFFFFFFF, PPC_NONE),
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GEN_HANDLER_E(copy, 0x1F, 0x06, 0x18, 0x03C00001, PPC_NONE, PPC2_ISA300),
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GEN_HANDLER_E(cp_abort, 0x1F, 0x06, 0x1A, 0x03FFF801, PPC_NONE, PPC2_ISA300),
target/ppc/translate/fixedpoint-impl.c.inc
+48
@@ -17,6 +17,54 @@
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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+/*
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+ * Byte-Reverse Instructions
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+ */
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+static bool trans_BRD(DisasContext *ctx, arg_BRD *a)
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+{
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+ REQUIRE_64BIT(ctx);
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+ REQUIRE_INSNS_FLAGS2(ctx, ISA310);
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+#if defined(TARGET_PPC64)
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+ tcg_gen_bswap64_i64(cpu_gpr[a->ra], cpu_gpr[a->rs]);
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+#else
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+ qemu_build_not_reached();
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+#endif
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+ return true;
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+}
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+
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+static bool trans_BRW(DisasContext *ctx, arg_BRW *a)
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+{
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+ REQUIRE_64BIT(ctx);
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+ REQUIRE_INSNS_FLAGS2(ctx, ISA310);
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+#if defined(TARGET_PPC64)
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+ tcg_gen_bswap64_i64(cpu_gpr[a->ra], cpu_gpr[a->rs]);
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+ tcg_gen_rotli_i64(cpu_gpr[a->ra], cpu_gpr[a->ra], 32);
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+#else
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+ qemu_build_not_reached();
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+#endif
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+ return true;
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+}
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+
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+static bool trans_BRH(DisasContext *ctx, arg_BRH *a)
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+{
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+ REQUIRE_64BIT(ctx);
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+ REQUIRE_INSNS_FLAGS2(ctx, ISA310);
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+#if defined(TARGET_PPC64)
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+ TCGv_i64 mask = tcg_constant_i64(0x00ff00ff00ff00ffull);
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+ TCGv_i64 t1 = tcg_temp_new_i64();
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+ TCGv_i64 t2 = tcg_temp_new_i64();
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+
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+ tcg_gen_shri_i64(t1, cpu_gpr[a->rs], 8);
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+ tcg_gen_and_i64(t2, t1, mask);
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+ tcg_gen_and_i64(t1, cpu_gpr[a->rs], mask);
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+ tcg_gen_shli_i64(t1, t1, 8);
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+ tcg_gen_or_i64(cpu_gpr[a->ra], t1, t2);
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+#else
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+ qemu_build_not_reached();
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+#endif
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+ return true;
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+}
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+
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/*
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* Fixed-Point Load/Store Instructions
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*/