@samitouri / QOSamiQemu / commits / c8220a096f

target/s390x: Update capstone disassembly to v6

In particular, this enables many more vector insns. Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Richard Henderson committed Aug 8, 2026 at 14:50 UTC c8220a096f00b21cad99d39e9c4736c1d1e81694
3 files changed +13 -4
disas/capstone.c
+1 -1
@@ -95,7 +95,7 @@ static cs_err cap_disas_start(disassemble_info *info, csh *handle)
95 (uintptr_t)&cap_skipdata_riscv);
96 break;
97
98 - case CS_ARCH_SYSZ:
98 + case CS_ARCH_SYSTEMZ:
99 cs_option(*handle, CS_OPT_SKIPDATA_SETUP,
100 (uintptr_t)&cap_skipdata_s390x);
101 break;
include/disas/capstone.h
+9 -2
@@ -4,7 +4,6 @@
4 #ifdef CONFIG_CAPSTONE
5
6 #define CAPSTONE_AARCH64_COMPAT_HEADER
7 -#define CAPSTONE_SYSTEMZ_COMPAT_HEADER
7 #include <capstone.h>
8
9 #else
@@ -19,7 +18,6 @@
18 #define CS_ARCH_X86 -1
19 #define CS_ARCH_PPC -1
20 #define CS_ARCH_SPARC -1
22 -#define CS_ARCH_SYSZ -1
21
22 #define CS_MODE_LITTLE_ENDIAN 0
23 #define CS_MODE_BIG_ENDIAN 0
@@ -84,6 +82,15 @@
82 #define CS_MODE_SH4A 0
83 #endif
84
85 +#if CS_API_MAJOR == 0
86 +#define CS_ARCH_SYSTEMZ -1
87 +#elif CS_API_MAJOR < 6
88 +#define CS_ARCH_SYSTEMZ CS_ARCH_SYSZ
89 +#endif
90 +#if CS_API_MAJOR < 6
91 +#define CS_MODE_SYSTEMZ_ARCH14 0
92 +#endif
93 +
94 #if CS_API_MAJOR < 5
95 #define CS_ARCH_TRICORE -1
96 #define CS_MODE_TRICORE_110 0
target/s390x/cpu.c
+3 -1
@@ -225,10 +225,12 @@ static void s390_cpu_reset_hold(Object *obj, ResetType type)
225 static void s390_cpu_disas_set_info(const CPUState *cpu, disassemble_info *info)
226 {
227 info->mach = bfd_mach_s390_64;
228 - info->cap_arch = CS_ARCH_SYSZ;
228 + info->cap_arch = CS_ARCH_SYSTEMZ;
229 info->endian = BFD_ENDIAN_BIG;
230 info->cap_insn_unit = 2;
231 info->cap_insn_split = 6;
232 + /* Disassemble everything, even if the cpu would trap on the insn. */
233 + info->cap_mode = CS_MODE_SYSTEMZ_ARCH14;
234 }
235
236 static void s390_cpu_realizefn(DeviceState *dev, Error **errp)