target/arm: Split zdn in do_z2z_nn and do_z2z_nn_fpst
Rename from z2z to zzz to indicate zd and zn may not overlap. During decode, retain z2z name and duplicate the same field into zd and zn. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20260826174213.614571-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson committed
Aug 26, 2026 at 10:41 UTC
c8e379717a0cfe660b6be9acd7dbef19681d5f47
2 files changed
+30
-36
target/arm/tcg/sme.decode
+2
-3
@@ -221,7 +221,6 @@ UMOPA2_s 1010000 1 10 0 ..... ... ... ..... . 10 .. @op_32
221
%zd_ax4 2:3 !function=times_4
222
223
&zzz_en zd zn zm esz n
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-&z2z_en zdn zm esz n
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@z2z_2x1 ....... . esz:2 .. zm:4 ....0. ..... .... . \
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&zzz_en n=2 zd=%zd_ax2 zn=%zd_ax2
@@ -266,9 +265,9 @@ FSCALE_n1 1100000 1 .. 10 .... 1010.0 01100 .... 0 @z2z_4x1
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%zm_ax4 18:3 !function=times_4
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@z2z_2x2 ....... . esz:2 . ....0 ....0. ..... .... . \
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- &z2z_en n=2 zdn=%zd_ax2 zm=%zm_ax2
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+ &zzz_en n=2 zd=%zd_ax2 zn=%zd_ax2 zm=%zm_ax2
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@z2z_4x4 ....... . esz:2 . ...00 ....1. ..... ...0 . \
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- &z2z_en n=4 zdn=%zd_ax4 zm=%zm_ax4
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+ &zzz_en n=4 zd=%zd_ax4 zn=%zd_ax4 zm=%zm_ax4
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SMAX_nn 1100000 1 .. 1 ..... 1011.0 00000 .... 0 @z2z_2x2
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SMAX_nn 1100000 1 .. 1 ..... 1011.0 00000 .... 0 @z2z_4x4
target/arm/tcg/translate-sme.c
+28
-33
@@ -718,36 +718,33 @@ TRANS_FEAT(SRSHL_n1, aa64_sme2, do_zzz_n1, a, gen_sme2_srshl)
718
TRANS_FEAT(URSHL_n1, aa64_sme2, do_zzz_n1, a, gen_sme2_urshl)
719
TRANS_FEAT(SQDMULH_n1, aa64_sme2, do_zzz_n1, a, gen_gvec_sve2_sqdmulh)
720
721
-static bool do_z2z_nn(DisasContext *s, arg_z2z_en *a, GVecGen3Fn *fn)
721
+static bool do_zzz_nn(DisasContext *s, arg_zzz_en *a, GVecGen3Fn *fn)
722
{
723
- int esz, dn, dm, vsz, n;
723
+ int esz = a->esz, vsz;
724
725
if (!sme_sm_enabled_check(s)) {
726
return true;
727
}
728
729
- esz = a->esz;
730
- n = a->n;
731
- dn = a->zdn;
732
- dm = a->zm;
729
vsz = streaming_vec_reg_size(s);
730
735
- for (int i = 0; i < n; i++) {
736
- int dofs = vec_full_reg_offset(s, dn + i);
737
- int mofs = vec_full_reg_offset(s, dm + i);
731
+ for (int i = 0, n = a->n; i < n; i++) {
732
+ int dofs = vec_full_reg_offset(s, a->zd + i);
733
+ int nofs = vec_full_reg_offset(s, a->zn + i);
734
+ int mofs = vec_full_reg_offset(s, a->zm + i);
735
739
- fn(esz, dofs, dofs, mofs, vsz, vsz);
736
+ fn(esz, dofs, nofs, mofs, vsz, vsz);
737
}
738
return true;
739
}
740
744
-TRANS_FEAT(SMAX_nn, aa64_sme2, do_z2z_nn, a, tcg_gen_gvec_smax)
745
-TRANS_FEAT(SMIN_nn, aa64_sme2, do_z2z_nn, a, tcg_gen_gvec_smin)
746
-TRANS_FEAT(UMAX_nn, aa64_sme2, do_z2z_nn, a, tcg_gen_gvec_umax)
747
-TRANS_FEAT(UMIN_nn, aa64_sme2, do_z2z_nn, a, tcg_gen_gvec_umin)
748
-TRANS_FEAT(SRSHL_nn, aa64_sme2, do_z2z_nn, a, gen_sme2_srshl)
749
-TRANS_FEAT(URSHL_nn, aa64_sme2, do_z2z_nn, a, gen_sme2_urshl)
750
-TRANS_FEAT(SQDMULH_nn, aa64_sme2, do_z2z_nn, a, gen_gvec_sve2_sqdmulh)
741
+TRANS_FEAT(SMAX_nn, aa64_sme2, do_zzz_nn, a, tcg_gen_gvec_smax)
742
+TRANS_FEAT(SMIN_nn, aa64_sme2, do_zzz_nn, a, tcg_gen_gvec_smin)
743
+TRANS_FEAT(UMAX_nn, aa64_sme2, do_zzz_nn, a, tcg_gen_gvec_umax)
744
+TRANS_FEAT(UMIN_nn, aa64_sme2, do_zzz_nn, a, tcg_gen_gvec_umin)
745
+TRANS_FEAT(SRSHL_nn, aa64_sme2, do_zzz_nn, a, gen_sme2_srshl)
746
+TRANS_FEAT(URSHL_nn, aa64_sme2, do_zzz_nn, a, gen_sme2_urshl)
747
+TRANS_FEAT(SQDMULH_nn, aa64_sme2, do_zzz_nn, a, gen_gvec_sve2_sqdmulh)
748
749
static bool do_zzz_n1_fpst(DisasContext *s, arg_zzz_en *a,
750
gen_helper_gvec_3_ptr * const fns[4])
@@ -788,10 +785,10 @@ static bool do_zzz_n1_fpst(DisasContext *s, arg_zzz_en *a,
785
return true;
786
}
787
791
-static bool do_z2z_nn_fpst(DisasContext *s, arg_z2z_en *a,
788
+static bool do_zzz_nn_fpst(DisasContext *s, arg_zzz_en *a,
789
gen_helper_gvec_3_ptr * const fns[4])
790
{
794
- int esz = a->esz, n, dn, dm, vsz;
791
+ int esz = a->esz, vsz;
792
gen_helper_gvec_3_ptr *fn = fns[esz];
793
TCGv_ptr fpst;
794
@@ -806,16 +803,14 @@ static bool do_z2z_nn_fpst(DisasContext *s, arg_z2z_en *a,
803
}
804
805
fpst = fpstatus_ptr(esz == MO_16 ? FPST_A64_F16 : FPST_A64);
809
- n = a->n;
810
- dn = a->zdn;
811
- dm = a->zm;
806
vsz = streaming_vec_reg_size(s);
807
814
- for (int i = 0; i < n; i++) {
815
- int dofs = vec_full_reg_offset(s, dn + i);
816
- int mofs = vec_full_reg_offset(s, dm + i);
808
+ for (int i = 0, n = a->n; i < n; i++) {
809
+ int dofs = vec_full_reg_offset(s, a->zd + i);
810
+ int nofs = vec_full_reg_offset(s, a->zn + i);
811
+ int mofs = vec_full_reg_offset(s, a->zm + i);
812
818
- tcg_gen_gvec_3_ptr(dofs, dofs, mofs, fpst, vsz, vsz, 0, fn);
813
+ tcg_gen_gvec_3_ptr(dofs, nofs, mofs, fpst, vsz, vsz, 0, fn);
814
}
815
return true;
816
}
@@ -831,7 +826,7 @@ static gen_helper_gvec_3_ptr * const f_vector_fmax[2][4] = {
826
gen_helper_gvec_ah_fmax_d },
827
};
828
TRANS_FEAT(FMAX_n1, aa64_sme2, do_zzz_n1_fpst, a, f_vector_fmax[s->fpcr_ah])
834
-TRANS_FEAT(FMAX_nn, aa64_sme2, do_z2z_nn_fpst, a, f_vector_fmax[s->fpcr_ah])
829
+TRANS_FEAT(FMAX_nn, aa64_sme2, do_zzz_nn_fpst, a, f_vector_fmax[s->fpcr_ah])
830
831
static gen_helper_gvec_3_ptr * const f_vector_fmin[2][4] = {
832
{ gen_helper_gvec_fmin_b16,
@@ -844,7 +839,7 @@ static gen_helper_gvec_3_ptr * const f_vector_fmin[2][4] = {
839
gen_helper_gvec_ah_fmin_d },
840
};
841
TRANS_FEAT(FMIN_n1, aa64_sme2, do_zzz_n1_fpst, a, f_vector_fmin[s->fpcr_ah])
847
-TRANS_FEAT(FMIN_nn, aa64_sme2, do_z2z_nn_fpst, a, f_vector_fmin[s->fpcr_ah])
842
+TRANS_FEAT(FMIN_nn, aa64_sme2, do_zzz_nn_fpst, a, f_vector_fmin[s->fpcr_ah])
843
844
static gen_helper_gvec_3_ptr * const f_vector_fmaxnm[4] = {
845
gen_helper_gvec_fmaxnum_b16,
@@ -853,7 +848,7 @@ static gen_helper_gvec_3_ptr * const f_vector_fmaxnm[4] = {
848
gen_helper_gvec_fmaxnum_d,
849
};
850
TRANS_FEAT(FMAXNM_n1, aa64_sme2, do_zzz_n1_fpst, a, f_vector_fmaxnm)
856
-TRANS_FEAT(FMAXNM_nn, aa64_sme2, do_z2z_nn_fpst, a, f_vector_fmaxnm)
851
+TRANS_FEAT(FMAXNM_nn, aa64_sme2, do_zzz_nn_fpst, a, f_vector_fmaxnm)
852
853
static gen_helper_gvec_3_ptr * const f_vector_fminnm[4] = {
854
gen_helper_gvec_fminnum_b16,
@@ -862,7 +857,7 @@ static gen_helper_gvec_3_ptr * const f_vector_fminnm[4] = {
857
gen_helper_gvec_fminnum_d,
858
};
859
TRANS_FEAT(FMINNM_n1, aa64_sme2, do_zzz_n1_fpst, a, f_vector_fminnm)
865
-TRANS_FEAT(FMINNM_nn, aa64_sme2, do_z2z_nn_fpst, a, f_vector_fminnm)
860
+TRANS_FEAT(FMINNM_nn, aa64_sme2, do_zzz_nn_fpst, a, f_vector_fminnm)
861
862
static gen_helper_gvec_3_ptr * const f_vector_famax[4] = {
863
NULL,
@@ -870,7 +865,7 @@ static gen_helper_gvec_3_ptr * const f_vector_famax[4] = {
865
gen_helper_gvec_famax_s,
866
gen_helper_gvec_famax_d,
867
};
873
-TRANS_FEAT(FAMAX_nn, aa64_sme2_faminmax, do_z2z_nn_fpst, a, f_vector_famax)
868
+TRANS_FEAT(FAMAX_nn, aa64_sme2_faminmax, do_zzz_nn_fpst, a, f_vector_famax)
869
870
static gen_helper_gvec_3_ptr * const f_vector_famin[4] = {
871
NULL,
@@ -878,7 +873,7 @@ static gen_helper_gvec_3_ptr * const f_vector_famin[4] = {
873
gen_helper_gvec_famin_s,
874
gen_helper_gvec_famin_d,
875
};
881
-TRANS_FEAT(FAMIN_nn, aa64_sme2_faminmax, do_z2z_nn_fpst, a, f_vector_famin)
876
+TRANS_FEAT(FAMIN_nn, aa64_sme2_faminmax, do_zzz_nn_fpst, a, f_vector_famin)
877
878
static gen_helper_gvec_3_ptr * const f_vector_fscale[4] = {
879
NULL,
@@ -887,7 +882,7 @@ static gen_helper_gvec_3_ptr * const f_vector_fscale[4] = {
882
gen_helper_gvec_fscale_d,
883
};
884
TRANS_FEAT(FSCALE_n1, aa64_sme2_f8cvt, do_zzz_n1_fpst, a, f_vector_fscale)
890
-TRANS_FEAT(FSCALE_nn, aa64_sme2_f8cvt, do_z2z_nn_fpst, a, f_vector_fscale)
885
+TRANS_FEAT(FSCALE_nn, aa64_sme2_f8cvt, do_zzz_nn_fpst, a, f_vector_fscale)
886
887
/* Add/Sub vector Z[m] to each Z[n*N] with result in ZA[d*N]. */
888
static bool do_azz_n1(DisasContext *s, arg_azz_n *a, int esz,