@samitouri / QOSamiQemu / commits / cbac82dbb7

hw/char/serial: Prefer fifo8 methods over open-coding

Use fifo8_is_empty() and fifo8_is_full() to improve readability of the code. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20260305220911.131508-7-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Bernhard Beschow committed Mar 5, 2026 at 23:09 UTC cbac82dbb7217b14e25c81a5bd92dc01aa1c15c2
1 file changed +4 -4
hw/char/serial.c
+4 -4
@@ -239,7 +239,7 @@ static void serial_xmit(SerialState *s)
239 if (s->fcr & UART_FCR_FE) {
240 assert(!fifo8_is_empty(&s->xmit_fifo));
241 s->tsr = fifo8_pop(&s->xmit_fifo);
242 - if (!s->xmit_fifo.num) {
242 + if (fifo8_is_empty(&s->xmit_fifo)) {
243 s->lsr |= UART_LSR_THRE;
244 }
245 } else {
@@ -481,7 +481,7 @@ static uint64_t serial_ioport_read(void *opaque, hwaddr addr, unsigned size)
481 if(s->fcr & UART_FCR_FE) {
482 ret = fifo8_is_empty(&s->recv_fifo) ?
483 0 : fifo8_pop(&s->recv_fifo);
484 - if (s->recv_fifo.num == 0) {
484 + if (fifo8_is_empty(&s->recv_fifo)) {
485 s->lsr &= ~(UART_LSR_DR | UART_LSR_BI);
486 } else {
487 timer_mod(s->fifo_timeout_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + s->char_transmit_time * 4);
@@ -555,7 +555,7 @@ static uint64_t serial_ioport_read(void *opaque, hwaddr addr, unsigned size)
555 static int serial_can_receive(SerialState *s)
556 {
557 if(s->fcr & UART_FCR_FE) {
558 - if (s->recv_fifo.num < UART_FIFO_LENGTH) {
558 + if (!fifo8_is_full(&s->recv_fifo)) {
559 /*
560 * Advertise (fifo.itl - fifo.count) bytes when count < ITL, and 1
561 * if above. If UART_FIFO_LENGTH - fifo.count is advertised the
@@ -585,7 +585,7 @@ static void serial_receive_break(SerialState *s)
585 /* There's data in recv_fifo and s->rbr has not been read for 4 char transmit times */
586 static void fifo_timeout_int (void *opaque) {
587 SerialState *s = opaque;
588 - if (s->recv_fifo.num) {
588 + if (!fifo8_is_empty(&s->recv_fifo)) {
589 s->timeout_ipending = 1;
590 serial_update_irq(s);
591 }