target/arm: Implement BFTMOPA (widening)
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20260713230244.70174-5-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson committed
Aug 11, 2026 at 20:14 UTC
cfe1e6503a0b828b7237d5c16c3b7f59f5bd7449
4 files changed
+61
target/arm/tcg/helper-sme-defs.h
+2
@@ -408,3 +408,5 @@ DEF_HELPER_FLAGS_4(sme_usmop4s_dh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_6(sme_bftmopa_hh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, fpst, i32)
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DEF_HELPER_FLAGS_6(sme_ftmopa_hh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, fpst, i32)
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DEF_HELPER_FLAGS_6(sme_ftmopa_ss, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, fpst, i32)
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+
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+DEF_HELPER_FLAGS_6(sme_bftmopa_sh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, env, i32)
target/arm/tcg/sme.decode
+2
@@ -1145,3 +1145,5 @@ USMOP4_dh 1010 0001 110. ...0 0000 00.. ..0. 1... @mop4_o3
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BFTMOPA_hh 1000 0001 011 ..... 000 ... .... .. 100 . @tmop_o1
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FTMOPA_hh 1000 0001 010 ..... 000 ... .... .. 100 . @tmop_o1
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FTMOPA_ss 1000 0000 010 ..... 000 ... .... .. 00 .. @tmop_o2
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+
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+BFTMOPA_sh 1000 0001 010 ..... 000 ... .... .. 00 .. @tmop_o2
target/arm/tcg/sme_helper.c
+54
@@ -2679,6 +2679,50 @@ static void sme_tmop(void *vza, void *vzn, void *vzm, uint64_t *zk,
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}
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}
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+/*
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+ * Sparse outer product, widening 2-way, 16 to 32-bit.
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+ */
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+static void sme_tmop_2way_sh(uint32_t *za, uint16_t *zn0, uint32_t *zm,
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+ uint64_t *zk, void *fn_opaque, uint32_t desc,
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+ void (*fn)(void *, void *, void *, void *))
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+{
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+ intptr_t oprsz = simd_maxsz(desc);
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+ intptr_t dim = oprsz >> MO_32;
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+ intptr_t index = simd_data(desc);
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+ intptr_t ctrl_base = (index * oprsz) >> 1;
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+ uint16_t *zn1 = zn0 + sizeof(ARMVectorReg) / 2;
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+
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+ for (intptr_t row = 0; row < dim; row++) {
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+ uint32_t *za_row = za + tile_vslice_offset(row);
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+
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+ for (intptr_t col = 0; col < dim; col++) {
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+ uint32_t *e2 = zm + H4(col);
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+ uint32_t *e3 = za_row + H4(col);
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+ uint32_t e1 = 0;
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+
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+ /*
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+ * Four control bits select two elements. The two elements
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+ * may be non-contiguous, so assemble them locally into e1.
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+ * Pseudo-code has a double loop running forward, with a
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+ * test for (i < 2) to limit construction to 2 elements.
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+ * Easier to run a single loop backward, shifting extra
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+ * elements off the top of our uint32_t.
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+ */
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+ uint64_t this_ctrl = extractn(zk, ctrl_base + col * 4, 4);
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+ for (int i = 3; i >= 0; i--) {
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+ if (this_ctrl & (1 << i)) {
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+ bool e = i & 1;
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+ bool r = i & 2;
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+ uint16_t *p = (r ? zn1 : zn0) + H2(2 * row + e);
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+ e1 = (e1 << 16) | *p;
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+ }
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+ }
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+
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+ fn(e3, &e1, e2, fn_opaque);
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+ }
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+ }
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+}
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+
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static void inner_fmop4a_hh(void *vd, void *vn, void *vm, void *vinfo)
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{
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float16 *d = vd, *n = vn, *m = vm;
@@ -2893,6 +2937,16 @@ void HELPER(sme_bfmop4a_sh)(void *vza, void *vzn, void *vzm,
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: inner_bfmop4a_sh);
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}
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+void HELPER(sme_bftmopa_sh)(void *vza, void *vzn, void *vzm, void *vzk,
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+ CPUArchState *env, uint32_t desc)
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+{
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+ float_status fpst;
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+
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+ sme_tmop_2way_sh(vza, vzn, vzm, vzk, &fpst, desc,
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+ is_ebf(env, &fpst) ? inner_ebf_bfmop4a_sh
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+ : inner_bfmop4a_sh);
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+}
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+
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static void inner_bfmop4s_sh(void *vd, void *vn, void *vm, void *vinfo)
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{
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float32 *d = vd;
target/arm/tcg/translate-sme.c
+3
@@ -2162,3 +2162,6 @@ TRANS_FEAT(FTMOPA_hh, aa64_sme_tmop_f16f16, do_tmop_fp,
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a, MO_16, FPST_ZA_F16, gen_helper_sme_ftmopa_hh)
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TRANS_FEAT(FTMOPA_ss, aa64_sme_tmop, do_tmop_fp,
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a, MO_32, FPST_ZA, gen_helper_sme_ftmopa_ss)
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+
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+TRANS_FEAT(BFTMOPA_sh, aa64_sme_tmop, do_tmop_fp,
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+ a, MO_32, FPST_ENV, gen_helper_sme_bftmopa_sh)