target/arm: Move kvm test out of cpu_arm_set_sve
Introduce a set of stub property callbacks for when we really don't want to be able to enable SVE. Register the real or stub funtions in aarch64_add_sve_properties depending on whether or not SVE is available. Adjust aarch64_a64fx_initfn to initialize the set of supported vector sizes before calling aarch64_add_sve_properties. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20260216034432.23912-6-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson committed
Feb 26, 2026 at 11:27 UTC
d25293068b039c44e37d8a6892c6ca4344776866
2 files changed
+42
-8
target/arm/cpu64.c
+41
-7
@@ -300,6 +300,30 @@ static void cpu_arm_set_vq(Object *obj, Visitor *v, const char *name,
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vq_map->init |= 1 << (vq - 1);
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}
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+static void prop_bool_get_false(Object *obj, Visitor *v, const char *name,
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+ void *opaque, Error **errp)
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+{
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+ bool value = false;
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+ visit_type_bool(v, name, &value, errp);
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+}
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+
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+static void prop_bool_set_false(Object *obj, Visitor *v, const char *name,
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+ void *opaque, Error **errp)
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+{
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+ bool value;
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+
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+ if (visit_type_bool(v, name, &value, errp) && value) {
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+ error_setg(errp, "'%s' feature not supported by %s on this host",
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+ name, current_accel_name());
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+ }
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+}
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+
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+static void prop_add_stub_bool(Object *obj, const char *name)
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+{
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+ object_property_add(obj, name, "bool", prop_bool_get_false,
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+ prop_bool_set_false, NULL, NULL);
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+}
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+
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static bool cpu_arm_get_sve(Object *obj, Error **errp)
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{
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ARMCPU *cpu = ARM_CPU(obj);
@@ -309,12 +333,6 @@ static bool cpu_arm_get_sve(Object *obj, Error **errp)
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static void cpu_arm_set_sve(Object *obj, bool value, Error **errp)
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{
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ARMCPU *cpu = ARM_CPU(obj);
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-
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- if (value && kvm_enabled() && !kvm_arm_sve_supported()) {
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- error_setg(errp, "'sve' feature not supported by KVM on this host");
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- return;
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- }
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-
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FIELD_DP64_IDREG(&cpu->isar, ID_AA64PFR0, SVE, value);
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}
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@@ -471,7 +489,23 @@ void aarch64_add_sve_properties(Object *obj)
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ARMCPU *cpu = ARM_CPU(obj);
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uint32_t vq;
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- object_property_add_bool(obj, "sve", cpu_arm_get_sve, cpu_arm_set_sve);
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+ /*
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+ * For hw virtualization, we have already probed the set of vector
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+ * lengths supported. If there are none, the host doesn't support
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+ * SVE at all. In which case we register a stub property, to allow
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+ * -cpu max,sve=off
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+ * to always be valid.
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+ *
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+ * For TCG, this function is only called for cpu models which
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+ * support SVE. The error message in the stub is written
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+ * assuming host virtualiation is being used.
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+ */
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+ if (cpu->sve_vq.supported) {
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+ object_property_add_bool(obj, "sve", cpu_arm_get_sve, cpu_arm_set_sve);
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+ } else {
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+ assert(!tcg_enabled());
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+ prop_add_stub_bool(obj, "sve");
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+ }
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for (vq = 1; vq <= ARM_MAX_VQ; ++vq) {
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char name[8];
target/arm/tcg/cpu64.c
+1
-1
@@ -524,10 +524,10 @@ static void aarch64_a64fx_initfn(Object *obj)
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cpu->gic_pribits = 5;
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/* The A64FX supports only 128, 256 and 512 bit vector lengths */
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- aarch64_add_sve_properties(obj);
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cpu->sve_vq.supported = (1 << 0) /* 128bit */
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| (1 << 1) /* 256bit */
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| (1 << 3); /* 512bit */
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+ aarch64_add_sve_properties(obj);
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cpu->isar.reset_pmcr_el0 = 0x46014040;
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