target/arm: Implement SVE integer unary operations (predicated, zeroing)
This includes ABS, NEG, SXT{B,H,W}. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20260604234852.573178-6-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson committed
Jun 4, 2026 at 16:48 UTC
d25cfd22169290278787c49600359b3e413e8e55
2 files changed
+24
target/arm/tcg/sve.decode
+9
@@ -411,6 +411,15 @@ UXTH_m 00000100 .. 010 011 101 ... ..... ..... @rd_pg_rn
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SXTW_m 00000100 .. 010 100 101 ... ..... ..... @rd_pg_rn
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UXTW_m 00000100 .. 010 101 101 ... ..... ..... @rd_pg_rn
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+ABS_z 00000100 .. 000 110 101 ... ..... ..... @rd_pg_rn
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+NEG_z 00000100 .. 000 111 101 ... ..... ..... @rd_pg_rn
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+SXTB_z 00000100 .. 000 000 101 ... ..... ..... @rd_pg_rn
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+UXTB_z 00000100 .. 000 001 101 ... ..... ..... @rd_pg_rn
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+SXTH_z 00000100 .. 000 010 101 ... ..... ..... @rd_pg_rn
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+UXTH_z 00000100 .. 000 011 101 ... ..... ..... @rd_pg_rn
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+SXTW_z 00000100 .. 000 100 101 ... ..... ..... @rd_pg_rn
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+UXTW_z 00000100 .. 000 101 101 ... ..... ..... @rd_pg_rn
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+
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### SVE Floating Point Compare - Vectors Group
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# SVE floating-point compare vectors
target/arm/tcg/translate-sve.c
+15
@@ -811,12 +811,14 @@ static gen_helper_gvec_3 * const sve_abs_fns[4] = {
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gen_helper_sve_abs_s, gen_helper_sve_abs_d,
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};
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TRANS_FEAT(ABS_m, aa64_sme_or_sve, gen_gvec_ool_arg_zpz, sve_abs_fns[a->esz], a, 0)
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+TRANS_FEAT(ABS_z, aa64_sme2p2_or_sve2p2, gen_gvec_ool_arg_zpz, sve_abs_fns[a->esz], a, 1)
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static gen_helper_gvec_3 * const sve_neg_fns[4] = {
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gen_helper_sve_neg_b, gen_helper_sve_neg_h,
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gen_helper_sve_neg_s, gen_helper_sve_neg_d,
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};
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TRANS_FEAT(NEG_m, aa64_sme_or_sve, gen_gvec_ool_arg_zpz, sve_neg_fns[a->esz], a, 0)
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+TRANS_FEAT(NEG_z, aa64_sme2p2_or_sve2p2, gen_gvec_ool_arg_zpz, sve_neg_fns[a->esz], a, 1)
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static gen_helper_gvec_3 * const sve_rbit_fns[4] = {
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gen_helper_sve_rbit_b, gen_helper_sve_rbit_h,
@@ -873,6 +875,8 @@ static gen_helper_gvec_3 * const sxtb_fns[4] = {
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};
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TRANS_FEAT(SXTB_m, aa64_sme_or_sve, gen_gvec_ool_arg_zpz,
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sxtb_fns[a->esz], a, 0)
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+TRANS_FEAT(SXTB_z, aa64_sme2p2_or_sve2p2, gen_gvec_ool_arg_zpz,
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+ sxtb_fns[a->esz], a, 1)
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static gen_helper_gvec_3 * const uxtb_fns[4] = {
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NULL, gen_helper_sve_uxtb_h,
@@ -880,23 +884,34 @@ static gen_helper_gvec_3 * const uxtb_fns[4] = {
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};
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TRANS_FEAT(UXTB_m, aa64_sme_or_sve, gen_gvec_ool_arg_zpz,
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uxtb_fns[a->esz], a, 0)
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+TRANS_FEAT(UXTB_z, aa64_sme2p2_or_sve2p2, gen_gvec_ool_arg_zpz,
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+ uxtb_fns[a->esz], a, 1)
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static gen_helper_gvec_3 * const sxth_fns[4] = {
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NULL, NULL, gen_helper_sve_sxth_s, gen_helper_sve_sxth_d
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};
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TRANS_FEAT(SXTH_m, aa64_sme_or_sve, gen_gvec_ool_arg_zpz,
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sxth_fns[a->esz], a, 0)
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+TRANS_FEAT(SXTH_z, aa64_sme2p2_or_sve2p2, gen_gvec_ool_arg_zpz,
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+ sxth_fns[a->esz], a, 1)
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static gen_helper_gvec_3 * const uxth_fns[4] = {
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NULL, NULL, gen_helper_sve_uxth_s, gen_helper_sve_uxth_d
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};
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TRANS_FEAT(UXTH_m, aa64_sme_or_sve, gen_gvec_ool_arg_zpz,
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uxth_fns[a->esz], a, 0)
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+TRANS_FEAT(UXTH_z, aa64_sme2p2_or_sve2p2, gen_gvec_ool_arg_zpz,
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+ uxth_fns[a->esz], a, 1)
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TRANS_FEAT(SXTW_m, aa64_sme_or_sve, gen_gvec_ool_arg_zpz,
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a->esz == 3 ? gen_helper_sve_sxtw_d : NULL, a, 0)
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+TRANS_FEAT(SXTW_z, aa64_sme2p2_or_sve2p2, gen_gvec_ool_arg_zpz,
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+ a->esz == 3 ? gen_helper_sve_sxtw_d : NULL, a, 1)
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+
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TRANS_FEAT(UXTW_m, aa64_sme_or_sve, gen_gvec_ool_arg_zpz,
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a->esz == 3 ? gen_helper_sve_uxtw_d : NULL, a, 0)
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+TRANS_FEAT(UXTW_z, aa64_sme2p2_or_sve2p2, gen_gvec_ool_arg_zpz,
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+ a->esz == 3 ? gen_helper_sve_uxtw_d : NULL, a, 1)
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static gen_helper_gvec_3 * const addqv_fns[4] = {
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gen_helper_sve2p1_addqv_b, gen_helper_sve2p1_addqv_h,