@samitouri / QOSamiQemu / commits / d28a938ba5

docs/system: document FEAT_IVIPT

This is for documentation completeness - a system implements FEAT_IVIPT if it implements any permitted instruction cache implementation. QEMU doesn't model caches which is a permitted (non)implementation. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20260708145841.3032079-6-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Alex Bennée committed Jul 13, 2026 at 12:34 UTC d28a938ba557853af31552c1a8f9813ddb9ec531
1 file changed +1
docs/system/arm/emulation.rst
+1
@@ -104,6 +104,7 @@ the following architecture extensions:
104 - FEAT_I8MM (AArch64 Int8 matrix multiplication instructions)
105 - FEAT_IDST (ID space trap handling)
106 - FEAT_IESB (Implicit error synchronization event)
107 +- FEAT_IVIPT (The IVIPT Extension)
108 - FEAT_JSCVT (JavaScript conversion instructions)
109 - FEAT_LittleEnd (Support for little-endian at EL1 and above)
110 - FEAT_LittleEndEL0 (Support for little-endian at EL0)